From 2bad8ad2cd889d8c8d255b8e0dc0e7a187b98c9a Mon Sep 17 00:00:00 2001
From: pober <paul.obernesser@summitwave.eu>
Date: Thu, 9 Apr 2026 11:51:34 +0000
Subject: [PATCH] fix-latencybuildup (#1)

Co-authored-by: Pbopbo <p.obernesser@freenet.de>
Reviewed-on: https://gitea.summitwave.work/auracaster/hci_uart_beacon/pulls/1
---
 CMakePresets.json | 2 +-
 clk.conf          | 9 +++++++++
 internal_osc.conf | 4 ----
 iso.conf          | 9 +++++----
 lfxo.conf         | 4 ----
 prj.conf          | 4 ++--
 6 files changed, 17 insertions(+), 15 deletions(-)
 create mode 100644 clk.conf
 delete mode 100644 internal_osc.conf
 delete mode 100644 lfxo.conf

diff --git a/CMakePresets.json b/CMakePresets.json
index f4c52b6..cf3bf2d 100644
--- a/CMakePresets.json
+++ b/CMakePresets.json
@@ -13,7 +13,7 @@
             "cacheVariables": {
                 "NCS_TOOLCHAIN_VERSION": "NONE",
                 "BOARD": "nrf54l15dk/nrf54l15/cpuapp",
-                "EXTRA_CONF_FILE": "iso.conf;internal_osc.conf;lfxo.conf",
+                "EXTRA_CONF_FILE": "iso.conf;clk.conf",
                 "CONF_FILE": "prj.conf",
                 "DTC_OVERLAY_FILE": "bl54l15_radio0_radio1.overlay"
             }
diff --git a/clk.conf b/clk.conf
new file mode 100644
index 0000000..99784de
--- /dev/null
+++ b/clk.conf
@@ -0,0 +1,9 @@
+# 1. Disable the Crystal and RC Oscillators
+CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n
+CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
+
+# 2. Enable the Synthesized Clock (LFSYNT)
+CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH=n
+
+# 3. Claim High Accuracy (Because it is backed by the HFXO)
+CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
\ No newline at end of file
diff --git a/internal_osc.conf b/internal_osc.conf
deleted file mode 100644
index 86f6a47..0000000
--- a/internal_osc.conf
+++ /dev/null
@@ -1,4 +0,0 @@
-# use internal 32kHz oscillator
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
-# select desired accuracy (more calibrations would be nececcary if smaller) - I think the 32KHz oscillator is only needed for receive
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM=y
diff --git a/iso.conf b/iso.conf
index 19f688d..ecee63d 100644
--- a/iso.conf
+++ b/iso.conf
@@ -7,11 +7,11 @@ CONFIG_BT_CTLR_ADV_ISO_STREAM_MAX=5
 CONFIG_BT_CTLR_SYNC_PERIODIC_ADV_LIST_SIZE=5
 
 CONFIG_BT_BUF_EVT_RX_COUNT=16
-CONFIG_BT_CTLR_ADV_ISO_PDU_LEN_MAX=247
+CONFIG_BT_CTLR_ADV_ISO_PDU_LEN_MAX=140
 
 # ISO Transmissions
 CONFIG_BT_CTLR_ISOAL_SOURCES=5
-CONFIG_BT_CTLR_ISO_TX_BUFFERS=8
+CONFIG_BT_CTLR_ISO_TX_BUFFERS=2 # One of those needs to 2 to support stereo
 CONFIG_BT_CTLR_ISO_TX_BUFFER_SIZE=255
 
 CONFIG_BT_BUF_EVT_RX_SIZE=255
@@ -23,8 +23,9 @@ CONFIG_BT_CTLR_ASSERT_HANDLER=y
 CONFIG_BT_CTLR_DTM_HCI=n
 
 # Setup ISO Buffer
-CONFIG_BT_ISO_TX_BUF_COUNT=10
-CONFIG_BT_ISO_TX_MTU=251
+CONFIG_BT_ISO_TX_BUF_COUNT=2 # One of those needs to 2 to support stereo
+CONFIG_BT_CTLR_SDC_ISO_TX_PDU_BUFFER_PER_STREAM_COUNT=1
+CONFIG_BT_ISO_TX_MTU=140
 CONFIG_BT_ISO_RX_BUF_COUNT=10
 CONFIG_BT_ISO_RX_MTU=251
 
diff --git a/lfxo.conf b/lfxo.conf
deleted file mode 100644
index ae374c2..0000000
--- a/lfxo.conf
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_CLOCK_CONTROL=y
-CONFIG_CLOCK_CONTROL_NRF=y
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=n
diff --git a/prj.conf b/prj.conf
index 986dae0..6e9ce18 100644
--- a/prj.conf
+++ b/prj.conf
@@ -7,8 +7,8 @@ CONFIG_UART_INTERRUPT_DRIVEN=y
 
 CONFIG_CLOCK_CONTROL=y
 CONFIG_CLOCK_CONTROL_NRF=y
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
-CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=n
+
+
 CONFIG_BT=y
 CONFIG_BT_CTLR=y
 CONFIG_BT_LL_SOFTDEVICE=y