- added str912 test example, and test result
git-svn-id: svn://svn.berlios.de/openocd/trunk@410 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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mifi
91
testing/examples/STR912Test/src/main.c
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91
testing/examples/STR912Test/src/main.c
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/****************************************************************************
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* Copyright (c) 2006 by Michael Fischer. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of its contributors may
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* be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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****************************************************************************
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* History:
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*
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* 30.03.06 mifi First Version for Insight tutorial
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* 26.01.08 mifi Added variable "d" to test const variable.
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****************************************************************************/
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#define __MAIN_C__
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/*
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* I use the include only, to show
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* how to setup a include dir in the makefile
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*/
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#include "typedefs.h"
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/*=========================================================================*/
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/* DEFINE: All Structures and Common Constants */
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/*=========================================================================*/
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/*=========================================================================*/
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/* DEFINE: Prototypes */
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/*=========================================================================*/
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/*=========================================================================*/
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/* DEFINE: Definition of all local Data */
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/*=========================================================================*/
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static const DWORD d = 7;
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/*=========================================================================*/
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/* DEFINE: Definition of all local Procedures */
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/*=========================================================================*/
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/*=========================================================================*/
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/* DEFINE: All code exported */
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/*=========================================================================*/
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/***************************************************************************/
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/* main */
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/***************************************************************************/
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int main (void)
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{
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DWORD a = 1;
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DWORD b = 2;
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DWORD c = 0;
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a = a + d;
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while (1)
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{
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a++;
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b++;
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c = a + b;
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}
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/*
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* This return here make no sense.
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* But to prevent the compiler warning:
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* "return type of 'main' is not 'int'
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* we use an int as return :-)
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*/
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return(0);
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}
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/*** EOF ***/
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222
testing/examples/STR912Test/src/startup.s
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testing/examples/STR912Test/src/startup.s
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/***********************************************************************************
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* Copyright 2005 Anglia Design
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* This demo code and associated components are provided as is and has no warranty,
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* implied or otherwise. You are free to use/modify any of the provided
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* code at your own risk in your applications with the expressed limitation
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* of liability (see below)
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*
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* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
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* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
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* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
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* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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*
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* Author : Spencer Oliver
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* Web : www.anglia-designs.com
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*
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* mifi, 22.01.2008, small changes by the init of the C++ eabi constructors.
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* Here I have replaced the eabi init by the normal init.
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* Thanks to Spen for the startup code.
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***********************************************************************************/
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/**** Startup Code (executed after Reset) ****/
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/* Frequency values kHz */
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/* set to suit target hardware */
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.equ FOSC, 25000
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/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
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.equ Mode_USR, 0x10
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.equ Mode_FIQ, 0x11
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.equ Mode_IRQ, 0x12
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.equ Mode_SVC, 0x13
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.equ Mode_ABT, 0x17
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.equ Mode_UND, 0x1B
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.equ Mode_SYS, 0x1F /* available on ARM Arch 4 and later */
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.equ I_Bit, 0x80 /* when I bit is set, IRQ is disabled */
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.equ F_Bit, 0x40 /* when F bit is set, FIQ is disabled */
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.equ SRAM32, 0x00
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.equ SRAM64, 0x08
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.equ SRAM96, 0x10
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/* --- System memory locations */
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.equ SCRO_AHB_UMB, 0x5C002034 /* System configuration register 0 (unbuffered) */
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.equ FMI_BASE_UMB, 0x54000000 /* Flash FMI base address (unbuffered) */
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.equ BBSR_off_addr, 0x00
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.equ NBBSR_off_addr, 0x04
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.equ BBADR_off_addr, 0x0C
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.equ NBBADR_off_addr, 0x10
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.equ CR_off_addr, 0x18
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.ifndef LIBUFF
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.equ LIBUFF, 0
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.endif
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/* Startup Code must be linked first at Address at which it expects to run. */
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.text
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.arm
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.section .init, "ax"
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.global _start
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.global _Main_Crystal
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/* After remap this will be our reset handler */
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_start:
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LDR pc, =NextInst
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NextInst:
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NOP /* Wait for OSC stabilization */
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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/* Enable buffered mode */
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.if LIBUFF
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MRC p15, 0, r0, c1, c0, 0 /* Read CP15 register 1 into r0 */
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ORR r0, r0, #0x8 /* Enable Write Buffer on AHB */
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MCR p15, 0, r0, c1, c0, 0 /* Write CP15 register 1 */
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.endif
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/* Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, */
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/* when the bank 0 is the boot bank, then enable the Bank 1. */
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LDR r0, =FMI_BASE_UMB
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LDR r1, =0x4 /* configure 512KB Boot bank 0 */
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STR r1, [r0, #BBSR_off_addr]
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LDR r1, =0x2 /* configure 32KB Non Boot bank 1 */
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STR r1, [r0, #NBBSR_off_addr]
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LDR r1, =(0x00000000 >> 2) /* Boot Bank Base Address */
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STR r1, [r0, #BBADR_off_addr]
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LDR r1, =(0x00080000 >> 2) /* Non Boot Bank Base Address */
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STR r1, [r0, #NBBADR_off_addr]
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LDR r1, =0x18 /* Flash Banks 0 1 enabled */
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STR r1, [r0, #CR_off_addr]
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/* Enable 96K RAM */
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LDR r0, =SCRO_AHB_UMB
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# LDR r1, =0x0196 /* prefetch disabled, default enabled */
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LDR r1, =0x0187|SRAM96
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STR r1, [r0]
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/* Set bits 17-18 (Instruction/Data TCM order) of the */
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/* Core Configuration Control Register */
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MOV r0, #0x60000
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MCR p15, 0x1, r0, c15, c1, 0
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/* Setup Stack for each mode */
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/* Enter Abort Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_ABT|I_Bit|F_Bit
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LDR sp, =__stack_abt_end__
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/* Enter Undefined Instruction Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_UND|I_Bit|F_Bit
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LDR sp, =__stack_und_end__
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/* Enter Supervisor Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_SVC|I_Bit|F_Bit
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LDR sp, =__stack_svc_end__
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/* Enter FIQ Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_FIQ|I_Bit|F_Bit
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LDR sp, =__stack_fiq_end__
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/* Enter IRQ Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_IRQ|I_Bit|F_Bit
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LDR sp, =__stack_irq_end__
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/* Enter System/User Mode and set its Stack Pointer */
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MSR cpsr_c, #Mode_SYS
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LDR sp, =__stack_end__
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/* Setup a default Stack Limit (when compiled with "-mapcs-stack-check") */
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LDR sl, =__bss_end__
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/* Relocate .data section (Copy from ROM to RAM) */
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LDR r1, =_etext
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LDR r2, =__data_start
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LDR r3, =_edata
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LoopRel:
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CMP r2, r3
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LDRLO r0, [r1], #4
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STRLO r0, [r2], #4
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BLO LoopRel
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/* Clear .bss section (Zero init) */
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MOV r0, #0
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LDR r1, =__bss_start__
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LDR r2, =__bss_end__
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LoopZI:
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CMP r1, r2
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STRLO r0, [r1], #4
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BLO LoopZI
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/* Call C++ constructors */
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LDR r0, =__ctors_start__
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LDR r1, =__ctors_end__
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ctor_loop:
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CMP r0, r1
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BEQ ctor_end
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LDR r2, [r0], #4
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STMFD sp!, {r0-r1}
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BLX r2
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LDMFD sp!, {r0-r1}
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B ctor_loop
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ctor_end:
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/* Need to set up standard file handles */
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/* Only used under simulator, normally overide syscall.c */
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# BL initialise_monitor_handles
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/* if we use debug version of str9lib this will call the init function */
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BL libdebug
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libdebug:
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/* Enter the C code, use B instruction so as to never return */
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/* use BL main if you want to use c++ destructors below */
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B main
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/* Return from main, loop forever. */
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#exit_loop:
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# B exit_loop
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/* Fosc values, used by libstr9 */
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_Main_Crystal: .long FOSC
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.weak libdebug
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.end
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