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riscv: replace macro DIM() with ARRAY_SIZE()

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OpenOCD already defines the macro ARRAY_SIZE, while riscv code
uses a local macro DIM.

Prefer using the macro ARRAY_SIZE() instead of DIM().
Not all the riscv code has been upstreamed, yes; this patch only
covers the code already upstreamed.

Change-Id: I89a58a6d91916d85c53ba5e4091b558271f8d618
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6258
Reviewed-by: Xiang W <wxjstz@126.com>
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
This commit is contained in:
Antonio Borneo
2021-05-16 14:02:53 +02:00
parent 8d207b5d2e
commit 036de3b482
3 changed files with 9 additions and 15 deletions
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4
src/target/riscv/riscv-011.c
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@@ -70,8 +70,6 @@
#define get_field(reg, mask) (((reg) & (mask)) / ((mask) & ~((mask) << 1)))
#define set_field(reg, mask, val) (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask)))
#define DIM(x) (sizeof(x)/sizeof(*x))
/* Constants for legacy SiFive hardware breakpoints. */
#define CSR_BPCONTROL_X (1<<0)
#define CSR_BPCONTROL_W (1<<1)
@@ -1634,7 +1632,7 @@ static riscv_error_t handle_halt_routine(struct target *target)
/* Read S0 from dscratch */
unsigned int csr[] = {CSR_DSCRATCH0, CSR_DPC, CSR_DCSR};
for (unsigned int i = 0; i < DIM(csr); i++) {
for (unsigned int i = 0; i < ARRAY_SIZE(csr); i++) {
scans_add_write32(scans, 0, csrr(S0, csr[i]), true);
scans_add_read(scans, SLOT0, false);
}