aarch64: remove armv7-a virt-to-phys code
Page table layout in aarch64 is very different from armv7-a layout. Remove the incorrect handling, to be replaced correct armv8 code in a later patch Change-Id: I64c728a72a24f9f4177726ccc07a02a8ca0d56ce Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
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@@ -228,6 +228,18 @@ target_to_armv8(struct target *target)
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#define CTI_GATE 0x140
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#define CTI_UNLOCK 0xFB0
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#define PAGE_SIZE_4KB 0x1000
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#define PAGE_SIZE_4KB_LEVEL0_BITS 39
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#define PAGE_SIZE_4KB_LEVEL1_BITS 30
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#define PAGE_SIZE_4KB_LEVEL2_BITS 21
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#define PAGE_SIZE_4KB_LEVEL3_BITS 12
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#define PAGE_SIZE_4KB_LEVEL0_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL0_BITS)
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#define PAGE_SIZE_4KB_LEVEL1_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL1_BITS)
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#define PAGE_SIZE_4KB_LEVEL2_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL2_BITS)
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#define PAGE_SIZE_4KB_LEVEL3_MASK ((0x1FFULL) << PAGE_SIZE_4KB_LEVEL3_BITS)
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#define PAGE_SIZE_4KB_TRBBASE_MASK 0xFFFFFFFFF000
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int armv8_arch_state(struct target *target);
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int armv8_identify_cache(struct target *target);
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