tcl: add config file for hpmicro devices and boards

- add board and device config files - add interface config file for hpmicro evk boards Change-Id: I8afb0b734b1064d71c4af3c118c7777d0ead9e6b Signed-off-by: Ryan QIAN <jianghao.qian@hpmicro.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8697 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2025-01-07 15:21:02 +08:00
parent 26507adfad
commit 0e2f990c87
23 changed files with 1837 additions and 0 deletions
--- a/tcl/target/hpmicro/hpm5300.cfg
+++ b/tcl/target/hpmicro/hpm5300.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251126/HPM5300DSV012.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm5361
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr_lite.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF410001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6280-dual-core.cfg
+++ b/tcl/target/hpmicro/hpm6280-dual-core.cfg
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM6200DSV26.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6280
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc release_core1 {} {
+	sba_write_mem 0xF4002C00 0x1000
+}
+
+set _TARGET1 $_CHIP.cpu1
+target create $_TARGET1 riscv -chain-position $_CHIP.cpu -coreid 1
+$_TARGET1 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+$_TARGET1 configure -event examine-start {
+	release_core1
+}
+
+$_TARGET1 configure -event reset-deassert-pre {
+	$::_TARGET0 arp_poll
+	release_core1
+}
+
+proc reset_soc {} {
+	sba_write_mem 0xF40C001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6280-single-core.cfg
+++ b/tcl/target/hpmicro/hpm6280-single-core.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM6200DSV26.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6280
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF40C001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6360.cfg
+++ b/tcl/target/hpmicro/hpm6360.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM6300DSV28-779.pdf:w
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6360
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF40C001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6750-dual-core.cfg
+++ b/tcl/target/hpmicro/hpm6750-dual-core.cfg
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM67006400DSV27.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6750
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc release_core1 {} {
+	set chip_rev [sba_read_mem 0x2001FF00]
+	if {$chip_rev != 0x56010100 } {
+		# set start point for core1
+		sba_write_mem 0xF4002C08 0x20016284
+	} else {
+		sba_write_mem 0xF4002C08 0x2001660c
+	}
+
+	# set boot flag for core1
+	sba_write_mem 0xF4002C0C 0xC1BEF1A9
+
+	# release core1
+	sba_write_mem 0xF4002C00 0x1000
+}
+
+set _TARGET1 $_CHIP.cpu1
+target create $_TARGET1 riscv -chain-position $_CHIP.cpu -coreid 1
+$_TARGET1 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+$_TARGET1 configure -event examine-start {
+	release_core1
+}
+
+$_TARGET1 configure -event reset-deassert-pre {
+	$::_TARGET0 arp_poll
+	release_core1
+}
+
+proc reset_soc {} {
+	sba_write_mem 0xF40C001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6750-single-core.cfg
+++ b/tcl/target/hpmicro/hpm6750-single-core.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2021 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM67006400DSV27.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6750
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF40C001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6880.cfg
+++ b/tcl/target/hpmicro/hpm6880.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2023 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251128/HPM6800DSV12.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6880
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF410001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6e80-dual-core.cfg
+++ b/tcl/target/hpmicro/hpm6e80-dual-core.cfg
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2024 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM6E00DSV011.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6e00
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc release_core1 {} {
+	sba_write_mem 0xF4002C00 0x1000
+}
+
+set _TARGET1 $_CHIP.cpu1
+target create $_TARGET1 riscv -chain-position $_CHIP.cpu -coreid 1
+$_TARGET1 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+$_TARGET1 configure -event examine-start {
+	release_core1
+}
+
+$_TARGET1 configure -event reset-deassert-pre {
+	$::_TARGET0 arp_poll
+	release_core1
+}
+
+$_TARGET0 configure -event reset-end {
+	sba_write_mem 0xF4002010 0x2
+}
+
+proc reset_soc {} {
+	sba_write_mem 0xF410001C 24000000
+}
--- a/tcl/target/hpmicro/hpm6e80-single-core.cfg
+++ b/tcl/target/hpmicro/hpm6e80-single-core.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2024 HPMicro
+#
+# datasheet: https://www.hpmicro.com/Public/Uploads/uploadfile/files/20251124/HPM6E00DSV011.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIP $CHIPNAME
+} else {
+	set _CHIP hpm6e00
+}
+set _CPUTAPID 0x1000563D
+jtag newtap $_CHIP cpu -irlen 5 -expected-id $_CPUTAPID
+
+set _TARGET0 $_CHIP.cpu0
+target create $_TARGET0 riscv -chain-position $_CHIP.cpu -coreid 0
+
+$_TARGET0 configure -work-area-phys 0x00000000 -work-area-size 0x20000 -work-area-backup 0
+
+source [find target/hpmicro/hpm_common.cfg]
+source [find target/hpmicro/hpm_common_csr.cfg]
+
+proc reset_soc {} {
+	sba_write_mem 0xF410001C 24000000
+}
--- a/tcl/target/hpmicro/hpm_common.cfg
+++ b/tcl/target/hpmicro/hpm_common.cfg
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2025 HPMicro
+
+source [find target/hpmicro/hpm_reset.cfg]
+
+set dmsbcs 0x38
+set dmsbaddress0 0x39
+set dmsbdata0 0x3C
+
+proc target0_dmi_write_reg {reg value} {
+	$::_TARGET0 riscv dmi_write ${reg} ${value}
+}
+
+proc target0_dmi_read_reg {reg} {
+	set v [$::_TARGET0 riscv dmi_read ${reg} $::dmsbdata0]
+	return ${v}
+}
+proc sba_write_mem {addr value} {
+	target0_dmi_write_reg $::dmsbaddress0 ${addr}
+	target0_dmi_write_reg $::dmsbdata0 ${value}
+}
+
+proc sba_read_mem {addr} {
+	set sbcs [expr { 0x100000 | [target0_dmi_read_reg $::dmsbcs] }]
+	target0_dmi_write_reg $::dmsbcs ${sbcs}
+	target0_dmi_write_reg $::dmsbaddress0 ${addr}
+	set value [target0_dmi_read_reg $::dmsbdata0]
+	return ${value}
+}
--- a/tcl/target/hpmicro/hpm_common_csr.cfg
+++ b/tcl/target/hpmicro/hpm_common_csr.cfg
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2024 HPMicro
+
+# expose non-standard csr registers
+# scounteren
+riscv expose_csrs 262
+# mcountinhibit
+riscv expose_csrs 800
+# milmb
+riscv expose_csrs 1984
+# mdlmb
+riscv expose_csrs 1985
+# mecc_code
+riscv expose_csrs 1986
+# mnvec
+riscv expose_csrs 1987
+# mxstatus
+riscv expose_csrs 1988
+# mpft_ctl
+riscv expose_csrs 1989
+# mhsp_ctl
+riscv expose_csrs 1990
+# msp_bound
+riscv expose_csrs 1991
+# msp_base
+riscv expose_csrs 1992
+# mdcause
+riscv expose_csrs 1993
+# mcache_ctl
+riscv expose_csrs 1994
+# mcctlbeginaddr
+riscv expose_csrs 1995
+# mcctlcommand
+riscv expose_csrs 1996
+# mcctldata
+riscv expose_csrs 1997
+# mcounterwen
+riscv expose_csrs 1998
+# mcounterinten
+riscv expose_csrs 1999
+# mmisc_ctl
+riscv expose_csrs 2000
+# mcountermask_m
+riscv expose_csrs 2001
+# mcountermask_s
+riscv expose_csrs 2002
+# mcountermask_u
+riscv expose_csrs 2003
+# mcounterovf
+riscv expose_csrs 2004
+# mslideleg
+riscv expose_csrs 2005
+# mclk_ctl
+riscv expose_csrs 2015
+# dexc2dbg
+riscv expose_csrs 2016
+# ddcause
+riscv expose_csrs 2017
+# uitb
+riscv expose_csrs 2048
+# ucode
+riscv expose_csrs 2049
+# udcause
+riscv expose_csrs 2057
+# ucctlbeginaddr
+riscv expose_csrs 2059
+# ucctlcommand
+riscv expose_csrs 2060
+# slie
+riscv expose_csrs 2500
+# slip
+riscv expose_csrs 2501
+# sdcause
+riscv expose_csrs 2505
+# scctldata
+riscv expose_csrs 2509
+# scounterinten
+riscv expose_csrs 2511
+# scountermask_m
+riscv expose_csrs 2513
+# scountermask_s
+riscv expose_csrs 2514
+# scountermask_u
+riscv expose_csrs 2515
+# scounterovf
+riscv expose_csrs 2516
+# scountinhibit
+riscv expose_csrs 2528
+# shpmevent3
+riscv expose_csrs 2531
+# shpmevent4
+riscv expose_csrs 2532
+# shpmevent5
+riscv expose_csrs 2533
+# shpmevent6
+riscv expose_csrs 2534
+# micm_cfg
+riscv expose_csrs 4032
+# mdcm_cfg
+riscv expose_csrs 4033
+# mmsc_cfg
+riscv expose_csrs 4034
+# mmsc_cfg2
+riscv expose_csrs 4035
--- a/tcl/target/hpmicro/hpm_common_csr_lite.cfg
+++ b/tcl/target/hpmicro/hpm_common_csr_lite.cfg
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2024 HPMicro
+
+# expose non-standard csr registers
+# mcountinhibit
+riscv expose_csrs 800
+# milmb
+riscv expose_csrs 1984
+# mdlmb
+riscv expose_csrs 1985
+# mecc_code
+riscv expose_csrs 1986
+# mnvec
+riscv expose_csrs 1987
+# mxstatus
+riscv expose_csrs 1988
+# mpft_ctl
+riscv expose_csrs 1989
+# mhsp_ctl
+riscv expose_csrs 1990
+# msp_bound
+riscv expose_csrs 1991
+# msp_base
+riscv expose_csrs 1992
+# mdcause
+riscv expose_csrs 1993
+# mcache_ctl
+riscv expose_csrs 1994
+# mcctlbeginaddr
+riscv expose_csrs 1995
+# mcctlcommand
+riscv expose_csrs 1996
+# mcctldata
+riscv expose_csrs 1997
+# mcounterwen
+riscv expose_csrs 1998
+# mcounterinten
+riscv expose_csrs 1999
+# mmisc_ctl
+riscv expose_csrs 2000
+# mcountermask_m
+riscv expose_csrs 2001
+# mcountermask_s
+riscv expose_csrs 2002
+# mcountermask_u
+riscv expose_csrs 2003
+# mcounterovf
+riscv expose_csrs 2004
+# dexc2dbg
+riscv expose_csrs 2016
+# ddcause
+riscv expose_csrs 2017
+# uitb
+riscv expose_csrs 2048
+# ucode
+riscv expose_csrs 2049
+# udcause
+riscv expose_csrs 2057
+# ucctlbeginaddr
+riscv expose_csrs 2059
+# ucctlcommand
+riscv expose_csrs 2060
+# micm_cfg
+riscv expose_csrs 4032
+# mdcm_cfg
+riscv expose_csrs 4033
+# mmsc_cfg
+riscv expose_csrs 4034
+# mmsc_cfg2
+riscv expose_csrs 4035
--- a/tcl/target/hpmicro/hpm_reset.cfg
+++ b/tcl/target/hpmicro/hpm_reset.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright (c) 2025 HPMicro
+
+# As debug access needs to be released by bootrom after reset,
+# and halt request set along with reset will be ignored, it needs
+# a short period of time for bootrom to release the access,
+# so we request halt again in reset-deassert-pre event.
+$_TARGET0 configure -event reset-deassert-pre {
+	sleep 1
+	if {$halt} {
+		$::_TARGET0 arp_halt
+	}
+}