target_t -> struct target
Remove misleading typedef and redundant suffix from struct target.
This commit is contained in:
@@ -37,7 +37,7 @@
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#include "arm_simulator.h"
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int arm7_9_debug_entry(target_t *target);
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int arm7_9_debug_entry(struct target *target);
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/**
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* Clear watchpoints for an ARM7/9 target.
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@@ -159,7 +159,7 @@ static int arm7_9_set_software_breakpoints(struct arm7_9_common *arm7_9)
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* @param target Pointer to an ARM7/9 target to setup
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* @return Result of clearing the watchpoints on the target
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*/
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int arm7_9_setup(target_t *target)
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int arm7_9_setup(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -178,7 +178,7 @@ int arm7_9_setup(target_t *target)
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* targets
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* @return ERROR_OK if successful
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*/
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int arm7_9_get_arch_pointers(target_t *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
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int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -210,7 +210,7 @@ int arm7_9_get_arch_pointers(target_t *target, struct arm **armv4_5_p, struct ar
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* queue. For software breakpoints, this will be the status of the
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* required memory reads and writes
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*/
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int arm7_9_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
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int arm7_9_set_breakpoint(struct target *target, struct breakpoint *breakpoint)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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int retval = ERROR_OK;
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@@ -339,7 +339,7 @@ int arm7_9_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint
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* queue. For software breakpoints, this will be the status of the
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* required memory reads and writes
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*/
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int arm7_9_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
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int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *breakpoint)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -434,7 +434,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoi
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* @return An error status if there is a problem adding the breakpoint or the
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* result of setting the breakpoint
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*/
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int arm7_9_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
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int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -484,7 +484,7 @@ int arm7_9_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint
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* @return Error status if there was a problem unsetting the breakpoint or the
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* watchpoints could not be cleared
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*/
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int arm7_9_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
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int arm7_9_remove_breakpoint(struct target *target, struct breakpoint *breakpoint)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -520,7 +520,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, struct breakpoint *breakpo
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* @return Error status if watchpoint set fails or the result of executing the
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* JTAG queue
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*/
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int arm7_9_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
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int arm7_9_set_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -591,7 +591,7 @@ int arm7_9_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint
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* @return Error status while trying to unset the watchpoint or the result of
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* executing the JTAG queue
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*/
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int arm7_9_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
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int arm7_9_unset_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -639,7 +639,7 @@ int arm7_9_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoi
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* @param watchpoint Pointer to the watchpoint to be added
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* @return Error status while trying to add the watchpoint
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*/
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int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
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int arm7_9_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -672,7 +672,7 @@ int arm7_9_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint
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* @param watchpoint Pointer to the watchpoint to be removed
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* @return Result of trying to unset the watchpoint
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*/
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int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
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int arm7_9_remove_watchpoint(struct target *target, struct watchpoint *watchpoint)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -699,7 +699,7 @@ int arm7_9_remove_watchpoint(struct target_s *target, struct watchpoint *watchpo
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* @return Error status if there is a timeout or a problem while executing the
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* JTAG queue
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*/
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int arm7_9_execute_sys_speed(struct target_s *target)
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int arm7_9_execute_sys_speed(struct target *target)
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{
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int retval;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -750,7 +750,7 @@ int arm7_9_execute_sys_speed(struct target_s *target)
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* @param target Pointer to the target to issue commands to
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* @return Always ERROR_OK
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*/
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int arm7_9_execute_fast_sys_speed(struct target_s *target)
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int arm7_9_execute_fast_sys_speed(struct target *target)
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{
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static int set = 0;
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static uint8_t check_value[4], check_mask[4];
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@@ -794,7 +794,7 @@ int arm7_9_execute_fast_sys_speed(struct target_s *target)
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* @param buffer Pointer to the buffer that will hold the data
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* @return The result of receiving data from the Embedded ICE unit
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*/
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int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
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int arm7_9_target_request_data(struct target *target, uint32_t size, uint8_t *buffer)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm_jtag *jtag_info = &arm7_9->jtag_info;
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@@ -822,14 +822,14 @@ int arm7_9_target_request_data(target_t *target, uint32_t size, uint8_t *buffer)
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* target is running and the DCC control register has the W bit high, this will
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* execute the request on the target.
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*
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* @param priv Void pointer expected to be a target_t pointer
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* @param priv Void pointer expected to be a struct target pointer
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* @return ERROR_OK unless there are issues with the JTAG queue or when reading
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* from the Embedded ICE unit
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*/
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int arm7_9_handle_target_request(void *priv)
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{
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int retval = ERROR_OK;
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target_t *target = priv;
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struct target *target = priv;
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if (!target_was_examined(target))
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return ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -887,7 +887,7 @@ int arm7_9_handle_target_request(void *priv)
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* @param target Pointer to the ARM7/9 target to poll
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* @return ERROR_OK or an error status if a command fails
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*/
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int arm7_9_poll(target_t *target)
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int arm7_9_poll(struct target *target)
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{
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int retval;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -980,7 +980,7 @@ int arm7_9_poll(target_t *target)
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* @param target Pointer to an ARM7/9 target to assert reset on
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* @return ERROR_FAIL if the JTAG device does not have SRST, otherwise ERROR_OK
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*/
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int arm7_9_assert_reset(target_t *target)
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int arm7_9_assert_reset(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -1072,7 +1072,7 @@ int arm7_9_assert_reset(target_t *target)
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* @param target Pointer to the target to have the reset deasserted
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* @return ERROR_OK or an error from polling or halting the target
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*/
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int arm7_9_deassert_reset(target_t *target)
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int arm7_9_deassert_reset(struct target *target)
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{
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int retval = ERROR_OK;
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LOG_DEBUG("target->state: %s",
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@@ -1112,7 +1112,7 @@ int arm7_9_deassert_reset(target_t *target)
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* @param target Pointer to the ARM7/9 target to have halt cleared
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* @return Always ERROR_OK
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*/
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int arm7_9_clear_halt(target_t *target)
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int arm7_9_clear_halt(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct reg *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
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@@ -1169,7 +1169,7 @@ int arm7_9_clear_halt(target_t *target)
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* @param target Pointer to the ARM7/9 target to be reset and halted by software
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* @return Error status if any of the commands fail, otherwise ERROR_OK
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*/
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int arm7_9_soft_reset_halt(struct target_s *target)
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int arm7_9_soft_reset_halt(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -1282,7 +1282,7 @@ int arm7_9_soft_reset_halt(struct target_s *target)
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* @param target Pointer to the ARM7/9 target to be halted
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* @return Always ERROR_OK
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*/
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int arm7_9_halt(target_t *target)
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int arm7_9_halt(struct target *target)
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{
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if (target->state == TARGET_RESET)
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{
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@@ -1344,7 +1344,7 @@ int arm7_9_halt(target_t *target)
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* @param target Pointer to target that is entering debug mode
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* @return Error code if anything fails, otherwise ERROR_OK
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*/
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int arm7_9_debug_entry(target_t *target)
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int arm7_9_debug_entry(struct target *target)
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{
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int i;
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uint32_t context[16];
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@@ -1502,7 +1502,7 @@ int arm7_9_debug_entry(target_t *target)
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* @return Error if the target is not halted, has an invalid core mode, or if
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* the JTAG queue fails to execute
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*/
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int arm7_9_full_context(target_t *target)
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int arm7_9_full_context(struct target *target)
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{
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int i;
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int retval;
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@@ -1595,7 +1595,7 @@ int arm7_9_full_context(target_t *target)
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* @return Error status if the target is not halted or the core mode in the
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* armv4_5 struct is invalid.
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*/
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int arm7_9_restore_context(target_t *target)
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int arm7_9_restore_context(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -1745,7 +1745,7 @@ int arm7_9_restore_context(target_t *target)
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* @param target Pointer to the ARM7/9 target to be restarted
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* @return Result of executing the JTAG queue
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*/
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int arm7_9_restart_core(struct target_s *target)
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int arm7_9_restart_core(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm_jtag *jtag_info = &arm7_9->jtag_info;
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@@ -1768,7 +1768,7 @@ int arm7_9_restart_core(struct target_s *target)
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*
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* @param target Pointer to the ARM7/9 target to enable watchpoints on
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*/
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void arm7_9_enable_watchpoints(struct target_s *target)
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void arm7_9_enable_watchpoints(struct target *target)
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{
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struct watchpoint *watchpoint = target->watchpoints;
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@@ -1786,7 +1786,7 @@ void arm7_9_enable_watchpoints(struct target_s *target)
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*
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* @param target Pointer to the ARM7/9 target to enable breakpoints on
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*/
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void arm7_9_enable_breakpoints(struct target_s *target)
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void arm7_9_enable_breakpoints(struct target *target)
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{
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struct breakpoint *breakpoint = target->breakpoints;
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@@ -1798,7 +1798,7 @@ void arm7_9_enable_breakpoints(struct target_s *target)
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}
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}
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int arm7_9_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
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int arm7_9_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -1958,7 +1958,7 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha
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return ERROR_OK;
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}
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void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
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void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -1995,7 +1995,7 @@ void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
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}
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}
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void arm7_9_disable_eice_step(target_t *target)
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void arm7_9_disable_eice_step(struct target *target)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -2010,7 +2010,7 @@ void arm7_9_disable_eice_step(target_t *target)
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embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
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}
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int arm7_9_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
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int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -2103,7 +2103,7 @@ int arm7_9_step(struct target_s *target, int current, uint32_t address, int hand
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return err;
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}
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int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
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int arm7_9_read_core_reg(struct target *target, int num, enum armv4_5_mode mode)
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{
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uint32_t* reg_p[16];
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uint32_t value;
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@@ -2169,7 +2169,7 @@ int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mod
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return ERROR_OK;
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}
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int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value)
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int arm7_9_write_core_reg(struct target *target, int num, enum armv4_5_mode mode, uint32_t value)
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{
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uint32_t reg[16];
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -2230,7 +2230,7 @@ int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo
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return jtag_execute_queue();
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}
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int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
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int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -2405,7 +2405,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size,
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return ERROR_OK;
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}
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int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
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int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
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@@ -2591,7 +2591,7 @@ int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size
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static int dcc_count;
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static uint8_t *dcc_buffer;
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static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info)
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static int arm7_9_dcc_completion(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info)
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{
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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@@ -2654,9 +2654,9 @@ static const uint32_t dcc_code[] =
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0xeafffff9 /* b w */
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};
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int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info));
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int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info));
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|
||||
int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer)
|
||||
int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
|
||||
{
|
||||
int retval;
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
@@ -2721,7 +2721,7 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count,
|
||||
return retval;
|
||||
}
|
||||
|
||||
int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
|
||||
int arm7_9_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum)
|
||||
{
|
||||
struct working_area *crc_algorithm;
|
||||
struct armv4_5_algorithm armv4_5_info;
|
||||
@@ -2805,7 +2805,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank)
|
||||
int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* blank)
|
||||
{
|
||||
struct working_area *erase_check_algorithm;
|
||||
struct reg_param reg_params[3];
|
||||
@@ -2876,7 +2876,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
|
||||
uint32_t value;
|
||||
int spsr;
|
||||
int retval;
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -2921,7 +2921,7 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command)
|
||||
int rotate;
|
||||
int spsr;
|
||||
int retval;
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -2962,7 +2962,7 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
|
||||
uint32_t value;
|
||||
uint32_t mode;
|
||||
int num;
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -2993,7 +2993,7 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
|
||||
{
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -3026,7 +3026,7 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
|
||||
{
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -3059,7 +3059,7 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
|
||||
{
|
||||
target_t *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct arm *armv4_5;
|
||||
struct arm7_9_common *arm7_9;
|
||||
|
||||
@@ -3090,7 +3090,7 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int arm7_9_init_arch_info(target_t *target, struct arm7_9_common *arm7_9)
|
||||
int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
|
||||
{
|
||||
int retval = ERROR_OK;
|
||||
struct arm *armv4_5 = &arm7_9->armv4_5_common;
|
||||
|
||||
Reference in New Issue
Block a user