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target/riscv: fix SV57 translation for kernel address space

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Fixes address translation for SV57 addresses.

See [1] for details.

Link: https://github.com/riscv-collab/riscv-openocd/pull/1285 [1]
Change-Id: I53f7062f16c0b9e8595f38c07810b2dbc300980b
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9187
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Parshintsev Anatoly
2025-08-15 22:46:56 +03:00
committed by Tomas Vanek
parent 68b0f7bdff
commit 12ab80ab45
1 changed files with 1 additions and 1 deletions
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src/target/riscv/riscv.c
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@@ -274,7 +274,7 @@ static const virt2phys_info_t sv57 = {
.pte_ppn_shift = {10, 19, 28, 37, 46},
.pte_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0xff},
.pa_ppn_shift = {12, 21, 30, 39, 48},
.pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0xff},
.pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff},
};
static const virt2phys_info_t sv57x4 = {