mips32: Added CP0 coprocessor R/W routines

This patch adds MIPS32 CP0 coprocessor R/W routines,
as well as adequate commands to use these routines via
telnet interface.

Now is becomes possible to affect CP0 internal registers
and configure CPU directly from OpenOCD.
This commit is contained in:
Drasko DRASKOVIC
2011-07-07 17:41:20 +02:00
committed by Øyvind Harboe
parent 800bc9308d
commit 1be7163408
6 changed files with 355 additions and 5 deletions

View File

@@ -4,6 +4,9 @@
* *
* Copyright (C) 2008 by David T.L. Wong *
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -149,6 +152,8 @@ struct mips32_algorithm
#define MIPS32_SDBBP 0x7000003F
#define MIPS16_SDBBP 0xE801
extern const struct command_registration mips32_command_handlers[];
int mips32_arch_state(struct target *target);
int mips32_init_arch_info(struct target *target,