mips32: Added CP0 coprocessor R/W routines
This patch adds MIPS32 CP0 coprocessor R/W routines, as well as adequate commands to use these routines via telnet interface. Now is becomes possible to affect CP0 internal registers and configure CPU directly from OpenOCD.
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committed by
Øyvind Harboe
parent
800bc9308d
commit
1be7163408
@@ -4,6 +4,9 @@
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* *
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* Copyright (C) 2008 by David T.L. Wong *
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* *
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* Copyright (C) 2011 by Drasko DRASKOVIC *
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* drasko.draskovic@gmail.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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@@ -149,6 +152,8 @@ struct mips32_algorithm
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#define MIPS32_SDBBP 0x7000003F
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#define MIPS16_SDBBP 0xE801
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extern const struct command_registration mips32_command_handlers[];
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int mips32_arch_state(struct target *target);
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int mips32_init_arch_info(struct target *target,
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