When setting up an ETM, cache its ETM_CONFIG register. Then

only expose the registers which are actually present.  They
could be missing for two basic reasons:

 - This version might not support them at all; e.g. ETMv1.1
   doesn't have some control/status registers.  (My sample of
   ARM9 boards shows all with ETMv1.3 support, FWIW.)

 - The configuration on this chip may not populate as many
   registers as possible; e.g. only two data value comparators
   instead of eight.

Includes a bugfix in the "etm info" command:  only one of the
two registers is missing on older silicon, so show the first
one before bailing.

Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled.  Also, give some examples of the kinds of
constrained trace which could be arranged.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
dbrownell
2009-09-23 21:52:40 +00:00
parent d9ce8a2f60
commit 22045fa6f2
3 changed files with 213 additions and 50 deletions

View File

@@ -165,6 +165,8 @@ typedef struct etm_context_s
bool data_half; /* port half on a 16 bit port */
bool pc_ok; /* full PC has been acquired */
bool ptr_ok; /* whether last_ptr is valid */
uint8_t bcd_vers; /* e.g. 0x13 == ETMv1.3 */
uint32_t config; /* cache of ETM_CONFIG value */
uint32_t current_pc; /* current program counter */
uint32_t last_branch; /* last branch address output */
uint32_t last_branch_reason; /* type of last branch encountered */