diff --git a/tcl/target/max32620.cfg b/tcl/target/max32620.cfg
index 807f8145e..0ea8d15c2 100644
--- a/tcl/target/max32620.cfg
+++ b/tcl/target/max32620.cfg
@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-
-# Maxim Integrated MAX32620 OpenOCD target configuration file
+# Maxim Integrated MAX32620 - Arm Cortex-M4F @ 96MHz
 
 # Set the reset pin configuration
 reset_config srst_only
diff --git a/tcl/target/max32625.cfg b/tcl/target/max32625.cfg
index 8d9479c39..4529e542a 100644
--- a/tcl/target/max32625.cfg
+++ b/tcl/target/max32625.cfg
@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-
-# Maxim Integrated MAX32625 OpenOCD target configuration file
+# Maxim Integrated MAX32625 - Arm Cortex-M4F @ 96MHz
 
 # Set the reset pin configuration
 reset_config srst_only
diff --git a/tcl/target/max3263x.cfg b/tcl/target/max3263x.cfg
index 413c49188..c8d99466c 100644
--- a/tcl/target/max3263x.cfg
+++ b/tcl/target/max3263x.cfg
@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-
-# Maxim Integrated MAX3263X OpenOCD target configuration file
+# Maxim Integrated MAX3263x - Arm Cortex-M4F @ 96MHz
 
 # Set the reset pin configuration
 reset_config none
diff --git a/tcl/target/max32670.cfg b/tcl/target/max32670.cfg
index b8c76af5e..92dc6e12f 100644
--- a/tcl/target/max32670.cfg
+++ b/tcl/target/max32670.cfg
@@ -1,10 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-# maxim Integrated OpenOCD target configuration file
+# Maxim Integrated MAX32670 - Arm Cortex-M4F @ 100MHz
 
-# reset pin configuration
+# Set the reset pin configuration
 reset_config none
-adapter_nsrst_delay 200
-adapter_nsrst_assert_width 200
 
 # Set flash parameters
 set FLASH_BASE 0x10000000
@@ -17,7 +15,7 @@ set FLASH_OPTIONS 0x01
 # Use Serial Wire Debug
 transport select swd
 
-source [find target/max32xxx.cfg]
+source [find target/max32xxx_common.cfg]
 
 # Early revisions of the MAX32670 will disable SWD upon reset. There are reserved address locations
 # in the ROM code that can be used to insert breakpoints.
diff --git a/tcl/target/max32672.cfg b/tcl/target/max32672.cfg
index 26c7c82db..9709b699f 100644
--- a/tcl/target/max32672.cfg
+++ b/tcl/target/max32672.cfg
@@ -1,10 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-# maxim Integrated OpenOCD target configuration file
+# Maxim Integrated MAX32672 - Arm Cortex-M4F @ 100MHz
 
-# reset pin configuration
+# Set the reset pin configuration
 reset_config none
-adapter_nsrst_delay 200
-adapter_nsrst_assert_width 200
+adapter srst pulse_width 200
 
 # Set flash parameters
 set FLASH_BASE 0x10000000
@@ -17,7 +16,7 @@ set FLASH_OPTIONS 0x01
 # Use Serial Wire Debug
 transport select swd
 
-source [find target/max32xxx.cfg]
+source [find target/max32xxx_common.cfg]
 
 # Add additional flash bank
 set FLASH_BASE 0x10080000
diff --git a/tcl/target/max32675.cfg b/tcl/target/max32675.cfg
index cbc718c9c..ade025db0 100644
--- a/tcl/target/max32675.cfg
+++ b/tcl/target/max32675.cfg
@@ -1,10 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-# maxim Integrated OpenOCD target configuration file
+# Maxim Integrated MAX32675 - Arm Cortex-M4F @ 100MHz
 
-# reset pin configuration
+# Set the reset pin configuration
 reset_config none
-adapter_nsrst_delay 200
-adapter_nsrst_assert_width 200
+adapter srst pulse_width 200
 
 # Set flash parameters
 set FLASH_BASE 0x10000000
@@ -17,9 +16,9 @@ set FLASH_OPTIONS 0x01
 # Use Serial Wire Debug
 transport select swd
 
-source [find target/max32xxx.cfg]
+source [find target/max32xxx_common.cfg]
 
-# Early revisions of the MAX3275 will disable SWD upon reset. There are reserved address locations
+# Early revisions of the MAX32675 will disable SWD upon reset. There are reserved address locations
 # in the ROM code that can be used to insert breakpoints.
 # This workaround will enable SWD for affected revisions.
 $_CHIPNAME.cpu configure -event reset-assert-pre {
diff --git a/tcl/target/max32690.cfg b/tcl/target/max32690.cfg
index 63f987458..de9d233be 100644
--- a/tcl/target/max32690.cfg
+++ b/tcl/target/max32690.cfg
@@ -1,9 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-# Maxim Integrated MAX32690 OpenOCD target configuration file
+# Maxim Integrated MAX32690 - Arm Cortex-M4F @ 120MHz
 
 # Set the reset pin configuration
 reset_config srst_only
-adapter srst delay 2
 adapter srst pulse_width 2
 
 # Set flash parameters
@@ -17,7 +16,7 @@ set FLASH_OPTIONS 0x01
 # Use Serial Wire Debug
 transport select swd
 
-source [find target/max32xxx.cfg]
+source [find target/max32xxx_common.cfg]
 
 # Add additional flash bank
 set FLASH_BASE 0x10300000