- convert spaces to tabs in at91sam7.[ch]

- add missing svn props

git-svn-id: svn://svn.berlios.de/openocd/trunk@1009 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
ntfreak
2008-09-27 13:00:01 +00:00
parent c90c48b00b
commit 279affdb98
10 changed files with 5400 additions and 5411 deletions
+883 -889
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+66 -67
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@@ -26,95 +26,94 @@
#include "flash.h"
#include "target.h"
typedef struct at91sam7_flash_bank_s
{
/* chip id register */
u32 cidr;
u16 cidr_ext;
u16 cidr_nvptyp;
u16 cidr_arch;
u16 cidr_sramsiz;
u16 cidr_nvpsiz;
u16 cidr_nvpsiz2;
u16 cidr_eproc;
u16 cidr_version;
char *target_name;
/* chip id register */
u32 cidr;
u16 cidr_ext;
u16 cidr_nvptyp;
u16 cidr_arch;
u16 cidr_sramsiz;
u16 cidr_nvpsiz;
u16 cidr_nvpsiz2;
u16 cidr_eproc;
u16 cidr_version;
char *target_name;
/* flash auto-detection */
u8 flash_autodetection;
/* flash auto-detection */
u8 flash_autodetection;
/* flash geometry */
u16 pages_per_sector;
u16 pagesize;
u16 pages_in_lockregion;
/* flash geometry */
u16 pages_per_sector;
u16 pagesize;
u16 pages_in_lockregion;
/* nv memory bits */
u16 num_lockbits_on;
u16 lockbits;
u16 num_nvmbits;
u16 num_nvmbits_on;
u16 nvmbits;
u8 securitybit;
/* nv memory bits */
u16 num_lockbits_on;
u16 lockbits;
u16 num_nvmbits;
u16 num_nvmbits_on;
u16 nvmbits;
u8 securitybit;
/* 0: not init
1: fmcn for nvbits (1uS)
2: fmcn for flash (1.5uS) */
u8 flashmode;
/* 0: not init
* 1: fmcn for nvbits (1uS)
* 2: fmcn for flash (1.5uS) */
u8 flashmode;
/* main clock status */
u8 mck_valid;
u32 mck_freq;
/* main clock status */
u8 mck_valid;
u32 mck_freq;
/* external clock frequency */
u32 ext_freq;
/* external clock frequency */
u32 ext_freq;
} at91sam7_flash_bank_t;
/* AT91SAM7 control registers */
#define DBGU_CIDR 0xFFFFF240
#define CKGR_MCFR 0xFFFFFC24
#define CKGR_MOR 0xFFFFFC20
#define CKGR_MCFR_MAINRDY 0x10000
#define CKGR_PLLR 0xFFFFFC2c
#define CKGR_PLLR_DIV 0xff
#define CKGR_PLLR_MUL 0x07ff0000
#define PMC_MCKR 0xFFFFFC30
#define PMC_MCKR_CSS 0x03
#define PMC_MCKR_PRES 0x1c
#define DBGU_CIDR 0xFFFFF240
#define CKGR_MCFR 0xFFFFFC24
#define CKGR_MOR 0xFFFFFC20
#define CKGR_MCFR_MAINRDY 0x10000
#define CKGR_PLLR 0xFFFFFC2c
#define CKGR_PLLR_DIV 0xff
#define CKGR_PLLR_MUL 0x07ff0000
#define PMC_MCKR 0xFFFFFC30
#define PMC_MCKR_CSS 0x03
#define PMC_MCKR_PRES 0x1c
/* Flash Controller Commands */
#define WP 0x01
#define SLB 0x02
#define WPL 0x03
#define CLB 0x04
#define EA 0x08
#define SGPB 0x0B
#define CGPB 0x0D
#define SSB 0x0F
#define WP 0x01
#define SLB 0x02
#define WPL 0x03
#define CLB 0x04
#define EA 0x08
#define SGPB 0x0B
#define CGPB 0x0D
#define SSB 0x0F
/* MC_FSR bit definitions */
#define MC_FSR_FRDY 1
#define MC_FSR_EOL 2
#define MC_FSR_FRDY 1
#define MC_FSR_EOL 2
/* AT91SAM7 constants */
#define RC_FREQ 32000
#define RC_FREQ 32000
/* Flash timing modes */
#define FMR_TIMING_NONE 0
#define FMR_TIMING_NVBITS 1
#define FMR_TIMING_FLASH 2
#define FMR_TIMING_NONE 0
#define FMR_TIMING_NVBITS 1
#define FMR_TIMING_FLASH 2
/* Flash size constants */
#define FLASH_SIZE_8KB 1
#define FLASH_SIZE_16KB 2
#define FLASH_SIZE_32KB 3
#define FLASH_SIZE_64KB 5
#define FLASH_SIZE_128KB 7
#define FLASH_SIZE_256KB 9
#define FLASH_SIZE_512KB 10
#define FLASH_SIZE_1024KB 12
#define FLASH_SIZE_2048KB 14
#define FLASH_SIZE_8KB 1
#define FLASH_SIZE_16KB 2
#define FLASH_SIZE_32KB 3
#define FLASH_SIZE_64KB 5
#define FLASH_SIZE_128KB 7
#define FLASH_SIZE_256KB 9
#define FLASH_SIZE_512KB 10
#define FLASH_SIZE_1024KB 12
#define FLASH_SIZE_2048KB 14
#endif /* AT91SAM7_H */
+954 -954
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+98 -98
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@@ -1,98 +1,98 @@
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef AT91SAM7_OLD_H
#define AT91SAM7_OLD_H
#include "flash.h"
#include "target.h"
typedef struct at91sam7_old_flash_bank_s
{
u32 working_area;
u32 working_area_size;
/* chip id register */
u32 cidr;
u16 cidr_ext;
u16 cidr_nvptyp;
u16 cidr_arch;
u16 cidr_sramsiz;
u16 cidr_nvpsiz;
u16 cidr_nvpsiz2;
u16 cidr_eproc;
u16 cidr_version;
char * target_name;
/* flash geometry */
u16 num_pages;
u16 pagesize;
u16 pages_in_lockregion;
u8 num_erase_regions;
u8 num_planes;
u32 *erase_region_info;
/* nv memory bits */
u16 num_lockbits;
u16 lockbits[4];
u16 num_nvmbits;
u16 nvmbits;
u8 securitybit;
u8 flashmode[4]; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
/* main clock status */
u8 mck_valid;
u32 mck_freq;
} at91sam7_old_flash_bank_t;
/* AT91SAM7 control registers */
#define DBGU_CIDR_old 0xFFFFF240
#define CKGR_MCFR_old 0xFFFFFC24
#define CKGR_MCFR_MAINRDY_old 0x10000
#define CKGR_PLLR_old 0xFFFFFC2c
#define CKGR_PLLR_DIV_old 0xff
#define CKGR_PLLR_MUL_old 0x07ff0000
#define PMC_MCKR_old 0xFFFFFC30
#define PMC_MCKR_CSS_old 0x03
#define PMC_MCKR_PRES_old 0x1c
/* Flash Controller Commands */
#define WP_old 0x01
#define SLB_old 0x02
#define WPL_old 0x03
#define CLB_old 0x04
#define EA_old 0x08
#define SGPB_old 0x0B
#define CGPB_old 0x0D
#define SSB_old 0x0F
/* MC_FSR bit definitions */
#define MC_FSR_FRDY_old 1
#define MC_FSR_EOL_old 2
/* AT91SAM7 constants */
#define RC_FREQ_old 32000
/* FLASH_TIMING_MODES */
#define FMR_TIMING_NONE_old 0
#define FMR_TIMING_NVBITS_old 1
#define FMR_TIMING_FLASH_old 2
#endif /* AT91SAM7_OLD_H */
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef AT91SAM7_OLD_H
#define AT91SAM7_OLD_H
#include "flash.h"
#include "target.h"
typedef struct at91sam7_old_flash_bank_s
{
u32 working_area;
u32 working_area_size;
/* chip id register */
u32 cidr;
u16 cidr_ext;
u16 cidr_nvptyp;
u16 cidr_arch;
u16 cidr_sramsiz;
u16 cidr_nvpsiz;
u16 cidr_nvpsiz2;
u16 cidr_eproc;
u16 cidr_version;
char * target_name;
/* flash geometry */
u16 num_pages;
u16 pagesize;
u16 pages_in_lockregion;
u8 num_erase_regions;
u8 num_planes;
u32 *erase_region_info;
/* nv memory bits */
u16 num_lockbits;
u16 lockbits[4];
u16 num_nvmbits;
u16 nvmbits;
u8 securitybit;
u8 flashmode[4]; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
/* main clock status */
u8 mck_valid;
u32 mck_freq;
} at91sam7_old_flash_bank_t;
/* AT91SAM7 control registers */
#define DBGU_CIDR_old 0xFFFFF240
#define CKGR_MCFR_old 0xFFFFFC24
#define CKGR_MCFR_MAINRDY_old 0x10000
#define CKGR_PLLR_old 0xFFFFFC2c
#define CKGR_PLLR_DIV_old 0xff
#define CKGR_PLLR_MUL_old 0x07ff0000
#define PMC_MCKR_old 0xFFFFFC30
#define PMC_MCKR_CSS_old 0x03
#define PMC_MCKR_PRES_old 0x1c
/* Flash Controller Commands */
#define WP_old 0x01
#define SLB_old 0x02
#define WPL_old 0x03
#define CLB_old 0x04
#define EA_old 0x08
#define SGPB_old 0x0B
#define CGPB_old 0x0D
#define SSB_old 0x0F
/* MC_FSR bit definitions */
#define MC_FSR_FRDY_old 1
#define MC_FSR_EOL_old 2
/* AT91SAM7 constants */
#define RC_FREQ_old 32000
/* FLASH_TIMING_MODES */
#define FMR_TIMING_NONE_old 0
#define FMR_TIMING_NVBITS_old 1
#define FMR_TIMING_FLASH_old 2
#endif /* AT91SAM7_OLD_H */
+15 -17
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@@ -80,25 +80,23 @@ extern flash_driver_t lpc288x_flash;
extern flash_driver_t ocl_flash;
flash_driver_t *flash_drivers[] = {
&lpc2000_flash,
&cfi_flash,
&at91sam7_flash,
&at91sam7_old_flash,
&str7x_flash,
&str9x_flash,
&aduc702x_flash,
&stellaris_flash,
&str9xpec_flash,
&stm32x_flash,
&tms470_flash,
&ecosflash_flash,
&lpc288x_flash,
&ocl_flash,
NULL,
&lpc2000_flash,
&cfi_flash,
&at91sam7_flash,
&at91sam7_old_flash,
&str7x_flash,
&str9x_flash,
&aduc702x_flash,
&stellaris_flash,
&str9xpec_flash,
&stm32x_flash,
&tms470_flash,
&ecosflash_flash,
&lpc288x_flash,
&ocl_flash,
NULL,
};
flash_bank_t *flash_banks;
static command_t *flash_cmd;
+8 -8
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@@ -92,13 +92,13 @@ extern flash_bank_t *get_flash_bank_by_num(int num);
extern flash_bank_t *get_flash_bank_by_num_noprobe(int num);
extern flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr);
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
#define ERROR_FLASH_OPERATION_FAILED (-902)
#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
#define ERROR_FLASH_BUSY (-905)
#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
#define ERROR_FLASH_BANK_NOT_PROBED (-907)
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
#define ERROR_FLASH_OPERATION_FAILED (-902)
#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
#define ERROR_FLASH_BUSY (-905)
#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
#define ERROR_FLASH_BANK_NOT_PROBED (-907)
#endif /* FLASH_H */