command_handler: change 'cmd_ctx' to CMD_CTX
Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
This commit is contained in:
@@ -412,11 +412,11 @@ static int arm720t_target_create(struct target *target, Jim_Interp *interp)
|
||||
COMMAND_HANDLER(arm720t_handle_cp15_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm720t_common *arm720t = target_to_arm720(target);
|
||||
struct arm_jtag *jtag_info;
|
||||
|
||||
retval = arm720t_verify_pointer(cmd_ctx, arm720t);
|
||||
retval = arm720t_verify_pointer(CMD_CTX, arm720t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -424,7 +424,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -439,7 +439,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
|
||||
uint32_t value;
|
||||
if ((retval = arm720t_read_cp15(target, opcode, &value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
|
||||
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -448,7 +448,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
|
||||
return retval;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
|
||||
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
|
||||
}
|
||||
else if (CMD_ARGC == 2)
|
||||
{
|
||||
@@ -457,10 +457,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
|
||||
|
||||
if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
|
||||
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
|
||||
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -2750,24 +2750,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
|
||||
uint32_t value;
|
||||
int spsr;
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "can't write registers while running");
|
||||
command_print(CMD_CTX, "can't write registers while running");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (CMD_ARGC < 2)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
|
||||
command_print(CMD_CTX, "usage: write_xpsr <value> <not cpsr | spsr>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -2794,24 +2794,24 @@ COMMAND_HANDLER(handle_arm7_9_write_xpsr_im8_command)
|
||||
int rotate;
|
||||
int spsr;
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "can't write registers while running");
|
||||
command_print(CMD_CTX, "can't write registers while running");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (CMD_ARGC < 3)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
|
||||
command_print(CMD_CTX, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -2834,24 +2834,24 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
|
||||
uint32_t value;
|
||||
uint32_t mode;
|
||||
int num;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "can't write registers while running");
|
||||
command_print(CMD_CTX, "can't write registers while running");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (CMD_ARGC < 3)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: write_core_reg <num> <mode> <value>");
|
||||
command_print(CMD_CTX, "usage: write_core_reg <num> <mode> <value>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -2864,12 +2864,12 @@ COMMAND_HANDLER(handle_arm7_9_write_core_reg_command)
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
@@ -2885,23 +2885,23 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm7_9 dbgrq <enable | disable>");
|
||||
command_print(CMD_CTX, "usage: arm7_9 dbgrq <enable | disable>");
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "use of EmbeddedICE dbgrq instead of breakpoint for target halt %s", (arm7_9->use_dbgrq) ? "enabled" : "disabled");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
@@ -2917,23 +2917,23 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm7_9 fast_memory_access <enable | disable>");
|
||||
command_print(CMD_CTX, "usage: arm7_9 fast_memory_access <enable | disable>");
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "fast memory access is %s", (arm7_9->fast_memory_access) ? "enabled" : "disabled");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
|
||||
if (!is_arm7_9(arm7_9))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
|
||||
@@ -2949,11 +2949,11 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm7_9 dcc_downloads <enable | disable>");
|
||||
command_print(CMD_CTX, "usage: arm7_9 dcc_downloads <enable | disable>");
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "dcc downloads are %s", (arm7_9->dcc_downloads) ? "enabled" : "disabled");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -664,7 +664,7 @@ static int arm920t_target_create(struct target *target, Jim_Interp *interp)
|
||||
COMMAND_HANDLER(arm920t_handle_read_cache_command)
|
||||
{
|
||||
int retval = ERROR_OK;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm920t_common *arm920t = target_to_arm920(target);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
|
||||
@@ -678,13 +678,13 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
|
||||
struct arm920t_cache_line d_cache[8][64], i_cache[8][64];
|
||||
int segment, index;
|
||||
|
||||
retval = arm920t_verify_pointer(cmd_ctx, arm920t);
|
||||
retval = arm920t_verify_pointer(CMD_CTX, arm920t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (CMD_ARGC != 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm920t read_cache <filename>");
|
||||
command_print(CMD_CTX, "usage: arm920t read_cache <filename>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -885,7 +885,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
|
||||
/* restore CP15 MMU and Cache settings */
|
||||
arm920t_write_cp15_physical(target, ARM920T_CP15_PHYS_ADDR(0, 0x1, 0), cp15_ctrl_saved);
|
||||
|
||||
command_print(cmd_ctx, "cache content successfully output to %s", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "cache content successfully output to %s", CMD_ARGV[0]);
|
||||
|
||||
fclose(output);
|
||||
|
||||
@@ -910,7 +910,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
|
||||
COMMAND_HANDLER(arm920t_handle_read_mmu_command)
|
||||
{
|
||||
int retval = ERROR_OK;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm920t_common *arm920t = target_to_arm920(target);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
|
||||
@@ -924,13 +924,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
|
||||
struct arm920t_tlb_entry d_tlb[64], i_tlb[64];
|
||||
int victim;
|
||||
|
||||
retval = arm920t_verify_pointer(cmd_ctx, arm920t);
|
||||
retval = arm920t_verify_pointer(CMD_CTX, arm920t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (CMD_ARGC != 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm920t read_mmu <filename>");
|
||||
command_print(CMD_CTX, "usage: arm920t read_mmu <filename>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -1168,7 +1168,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
|
||||
fprintf(output, "%i: 0x%8.8" PRIx32 " 0x%8.8" PRIx32 " 0x%8.8" PRIx32 " %s\n", i, i_tlb[i].cam, i_tlb[i].ram1, i_tlb[i].ram2, (i_tlb[i].cam & 0x20) ? "(valid)" : "(invalid)");
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "mmu content successfully output to %s", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "mmu content successfully output to %s", CMD_ARGV[0]);
|
||||
|
||||
fclose(output);
|
||||
|
||||
@@ -1193,16 +1193,16 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
|
||||
COMMAND_HANDLER(arm920t_handle_cp15_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm920t_common *arm920t = target_to_arm920(target);
|
||||
|
||||
retval = arm920t_verify_pointer(cmd_ctx, arm920t);
|
||||
retval = arm920t_verify_pointer(CMD_CTX, arm920t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -1217,7 +1217,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
|
||||
uint32_t value;
|
||||
if ((retval = arm920t_read_cp15_physical(target, address, &value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access reg %i", address);
|
||||
command_print(CMD_CTX, "couldn't access reg %i", address);
|
||||
return ERROR_OK;
|
||||
}
|
||||
if ((retval = jtag_execute_queue()) != ERROR_OK)
|
||||
@@ -1225,7 +1225,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
|
||||
return retval;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
|
||||
command_print(CMD_CTX, "%i: %8.8" PRIx32 "", address, value);
|
||||
}
|
||||
else if (CMD_ARGC == 2)
|
||||
{
|
||||
@@ -1233,10 +1233,10 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
|
||||
if ((retval = arm920t_write_cp15_physical(target, address, value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access reg %i", address);
|
||||
command_print(CMD_CTX, "couldn't access reg %i", address);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
|
||||
command_print(CMD_CTX, "%i: %8.8" PRIx32 "", address, value);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1246,17 +1246,17 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
|
||||
COMMAND_HANDLER(arm920t_handle_cp15i_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm920t_common *arm920t = target_to_arm920(target);
|
||||
|
||||
retval = arm920t_verify_pointer(cmd_ctx, arm920t);
|
||||
retval = arm920t_verify_pointer(CMD_CTX, arm920t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -1271,11 +1271,11 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
|
||||
uint32_t value;
|
||||
if ((retval = arm920t_read_cp15_interpreted(target, opcode, 0x0, &value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value);
|
||||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value);
|
||||
}
|
||||
else if (CMD_ARGC == 2)
|
||||
{
|
||||
@@ -1283,10 +1283,10 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
|
||||
if ((retval = arm920t_write_cp15_interpreted(target, opcode, value, 0)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value);
|
||||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 "", opcode, value);
|
||||
}
|
||||
else if (CMD_ARGC == 3)
|
||||
{
|
||||
@@ -1296,15 +1296,15 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], address);
|
||||
if ((retval = arm920t_write_cp15_interpreted(target, opcode, value, address)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
command_print(CMD_CTX, "couldn't execute %8.8" PRIx32 "", opcode);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "%8.8" PRIx32 ": %8.8" PRIx32 " %8.8" PRIx32 "", opcode, value, address);
|
||||
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32 " %8.8" PRIx32 "", opcode, value, address);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm920t cp15i <opcode> [value] [address]");
|
||||
command_print(CMD_CTX, "usage: arm920t cp15i <opcode> [value] [address]");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -1313,14 +1313,14 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
|
||||
COMMAND_HANDLER(arm920t_handle_cache_info_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm920t_common *arm920t = target_to_arm920(target);
|
||||
|
||||
retval = arm920t_verify_pointer(cmd_ctx, arm920t);
|
||||
retval = arm920t_verify_pointer(CMD_CTX, arm920t);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return armv4_5_handle_cache_info_command(cmd_ctx, &arm920t->armv4_5_mmu.armv4_5_cache);
|
||||
return armv4_5_handle_cache_info_command(CMD_CTX, &arm920t->armv4_5_mmu.armv4_5_cache);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -715,7 +715,7 @@ static int arm926ejs_target_create(struct target *target, Jim_Interp *interp)
|
||||
COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
|
||||
int opcode_1;
|
||||
int opcode_2;
|
||||
@@ -724,7 +724,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
|
||||
if ((CMD_ARGC < 4) || (CMD_ARGC > 5))
|
||||
{
|
||||
command_print(cmd_ctx, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]");
|
||||
command_print(CMD_CTX, "usage: arm926ejs cp15 <opcode_1> <opcode_2> <CRn> <CRm> [value]");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -733,13 +733,13 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], CRn);
|
||||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], CRm);
|
||||
|
||||
retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
|
||||
retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -748,7 +748,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
uint32_t value;
|
||||
if ((retval = arm926ejs->read_cp15(target, opcode_1, opcode_2, CRn, CRm, &value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access register");
|
||||
command_print(CMD_CTX, "couldn't access register");
|
||||
return ERROR_OK;
|
||||
}
|
||||
if ((retval = jtag_execute_queue()) != ERROR_OK)
|
||||
@@ -756,7 +756,7 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
return retval;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
|
||||
command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -764,10 +764,10 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], value);
|
||||
if ((retval = arm926ejs->write_cp15(target, opcode_1, opcode_2, CRn, CRm, value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "couldn't access register");
|
||||
command_print(CMD_CTX, "couldn't access register");
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
|
||||
command_print(CMD_CTX, "%i %i %i %i: %8.8" PRIx32 "", opcode_1, opcode_2, CRn, CRm, value);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -776,14 +776,14 @@ COMMAND_HANDLER(arm926ejs_handle_cp15_command)
|
||||
COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
|
||||
|
||||
retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
|
||||
retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
|
||||
return armv4_5_handle_cache_info_command(CMD_CTX, &arm926ejs->armv4_5_mmu.armv4_5_cache);
|
||||
}
|
||||
|
||||
static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
|
||||
|
||||
@@ -165,16 +165,16 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
|
||||
COMMAND_HANDLER(arm966e_handle_cp15_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm966e_common *arm966e = target_to_arm966(target);
|
||||
|
||||
retval = arm966e_verify_pointer(cmd_ctx, arm966e);
|
||||
retval = arm966e_verify_pointer(CMD_CTX, arm966e);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -189,7 +189,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
|
||||
uint32_t value;
|
||||
if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"couldn't access reg %" PRIi32,
|
||||
address);
|
||||
return ERROR_OK;
|
||||
@@ -199,7 +199,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
|
||||
return retval;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32,
|
||||
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
|
||||
address, value);
|
||||
}
|
||||
else if (CMD_ARGC == 2)
|
||||
@@ -208,12 +208,12 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
|
||||
if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"couldn't access reg %" PRIi32,
|
||||
address);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32,
|
||||
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
|
||||
address, value);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -831,7 +831,7 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
|
||||
|
||||
COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
|
||||
struct reg *vector_catch;
|
||||
uint32_t vector_catch_value;
|
||||
@@ -839,7 +839,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
|
||||
/* it's uncommon, but some ARM7 chips can support this */
|
||||
if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC
|
||||
|| !arm7_9->has_vector_catch) {
|
||||
command_print(cmd_ctx, "target doesn't have EmbeddedICE "
|
||||
command_print(CMD_CTX, "target doesn't have EmbeddedICE "
|
||||
"with vector_catch");
|
||||
return ERROR_TARGET_INVALID;
|
||||
}
|
||||
@@ -882,7 +882,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
|
||||
/* complain if vector wasn't found */
|
||||
if (!arm9tdmi_vectors[j].name)
|
||||
{
|
||||
command_print(cmd_ctx, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]);
|
||||
command_print(CMD_CTX, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]);
|
||||
|
||||
/* reread current setting */
|
||||
vector_catch_value = buf_get_u32(
|
||||
@@ -901,7 +901,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
|
||||
|
||||
/* output current settings */
|
||||
for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) {
|
||||
command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name,
|
||||
command_print(CMD_CTX, "%s: %s", arm9tdmi_vectors[i].name,
|
||||
(vector_catch_value & arm9tdmi_vectors[i].value)
|
||||
? "catch" : "don't catch");
|
||||
}
|
||||
|
||||
@@ -1386,7 +1386,7 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command)
|
||||
|
||||
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
|
||||
retval = swjdp_transaction_endcheck(swjdp);
|
||||
command_print(cmd_ctx, "0x%8.8" PRIx32, baseaddr);
|
||||
command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
|
||||
|
||||
if (apselsave != apsel)
|
||||
dap_ap_select(swjdp, apselsave);
|
||||
@@ -1410,7 +1410,7 @@ DAP_COMMAND_HANDLER(dap_memaccess_command)
|
||||
}
|
||||
swjdp->memaccess_tck = memaccess_tck;
|
||||
|
||||
command_print(cmd_ctx, "memory bus access delay set to %" PRIi32 " tck",
|
||||
command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
|
||||
swjdp->memaccess_tck);
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -1435,7 +1435,7 @@ DAP_COMMAND_HANDLER(dap_apsel_command)
|
||||
dap_ap_select(swjdp, apsel);
|
||||
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
|
||||
retval = swjdp_transaction_endcheck(swjdp);
|
||||
command_print(cmd_ctx, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32,
|
||||
command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32,
|
||||
apsel, apid);
|
||||
|
||||
return retval;
|
||||
@@ -1463,7 +1463,7 @@ DAP_COMMAND_HANDLER(dap_apid_command)
|
||||
|
||||
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
|
||||
retval = swjdp_transaction_endcheck(swjdp);
|
||||
command_print(cmd_ctx, "0x%8.8" PRIx32, apid);
|
||||
command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
|
||||
if (apselsave != apsel)
|
||||
dap_ap_select(swjdp, apselsave);
|
||||
|
||||
|
||||
@@ -358,18 +358,18 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
|
||||
char output[128];
|
||||
int output_len;
|
||||
int mode, num;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
|
||||
|
||||
if (!is_arm(armv4_5))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "error: target must be halted for register accesses");
|
||||
command_print(CMD_CTX, "error: target must be halted for register accesses");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -377,7 +377,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (!armv4_5->full_context) {
|
||||
command_print(cmd_ctx, "error: target doesn't support %s",
|
||||
command_print(CMD_CTX, "error: target doesn't support %s",
|
||||
CMD_NAME);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -397,9 +397,9 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
|
||||
ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).name,
|
||||
buf_get_u32(ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).value, 0, 32));
|
||||
}
|
||||
command_print(cmd_ctx, "%s", output);
|
||||
command_print(CMD_CTX, "%s", output);
|
||||
}
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
" cpsr: %8.8" PRIx32 " spsr_fiq: %8.8" PRIx32 " spsr_irq: %8.8" PRIx32 " spsr_svc: %8.8" PRIx32 " spsr_abt: %8.8" PRIx32 " spsr_und: %8.8" PRIx32 "",
|
||||
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
|
||||
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_SPSR_FIQ].value, 0, 32),
|
||||
@@ -413,12 +413,12 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
|
||||
|
||||
COMMAND_HANDLER(handle_armv4_5_core_state_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
|
||||
|
||||
if (!is_arm(armv4_5))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -434,7 +434,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "core state: %s", armv4_5_state_strings[armv4_5->core_state]);
|
||||
command_print(CMD_CTX, "core state: %s", armv4_5_state_strings[armv4_5->core_state]);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -442,14 +442,14 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
|
||||
COMMAND_HANDLER(handle_armv4_5_disassemble_command)
|
||||
{
|
||||
int retval = ERROR_OK;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm *arm = target ? target_to_arm(target) : NULL;
|
||||
uint32_t address;
|
||||
int count = 1;
|
||||
int thumb = 0;
|
||||
|
||||
if (!is_arm(arm)) {
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -466,7 +466,7 @@ COMMAND_HANDLER(handle_armv4_5_disassemble_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
|
||||
if (address & 0x01) {
|
||||
if (!thumb) {
|
||||
command_print(cmd_ctx, "Disassemble as Thumb");
|
||||
command_print(CMD_CTX, "Disassemble as Thumb");
|
||||
thumb = 1;
|
||||
}
|
||||
address &= ~1;
|
||||
@@ -474,7 +474,7 @@ COMMAND_HANDLER(handle_armv4_5_disassemble_command)
|
||||
break;
|
||||
default:
|
||||
usage:
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"usage: arm disassemble <address> [<count> ['thumb']]");
|
||||
count = 0;
|
||||
retval = ERROR_FAIL;
|
||||
@@ -503,7 +503,7 @@ usage:
|
||||
if (retval != ERROR_OK)
|
||||
break;
|
||||
}
|
||||
command_print(cmd_ctx, "%s", cur_instruction.text);
|
||||
command_print(CMD_CTX, "%s", cur_instruction.text);
|
||||
address += cur_instruction.instruction_size;
|
||||
}
|
||||
|
||||
|
||||
@@ -218,7 +218,7 @@ int armv7a_arch_state(struct target *target)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_baseaddr_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
struct swjdp_common *swjdp = &armv7a->swjdp_info;
|
||||
|
||||
@@ -227,7 +227,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_memaccess_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
struct swjdp_common *swjdp = &armv7a->swjdp_info;
|
||||
|
||||
@@ -236,7 +236,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_apsel_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
struct swjdp_common *swjdp = &armv7a->swjdp_info;
|
||||
|
||||
@@ -245,7 +245,7 @@ COMMAND_HANDLER(handle_dap_apsel_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_apid_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
struct swjdp_common *swjdp = &armv7a->swjdp_info;
|
||||
|
||||
@@ -254,7 +254,7 @@ COMMAND_HANDLER(handle_dap_apid_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_info_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
struct swjdp_common *swjdp = &armv7a->swjdp_info;
|
||||
uint32_t apsel;
|
||||
@@ -270,7 +270,7 @@ COMMAND_HANDLER(handle_dap_info_command)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
return dap_info_command(cmd_ctx, swjdp, apsel);
|
||||
return dap_info_command(CMD_CTX, swjdp, apsel);
|
||||
}
|
||||
|
||||
int armv7a_register_commands(struct command_context *cmd_ctx)
|
||||
|
||||
@@ -759,7 +759,7 @@ int armv7m_blank_check_memory(struct target *target,
|
||||
*/
|
||||
COMMAND_HANDLER(handle_dap_baseaddr_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7m_common *armv7m = target_to_armv7m(target);
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
uint32_t apsel, apselsave, baseaddr;
|
||||
@@ -782,7 +782,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command)
|
||||
|
||||
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
|
||||
retval = swjdp_transaction_endcheck(swjdp);
|
||||
command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
|
||||
command_print(CMD_CTX, "0x%8.8" PRIx32 "", baseaddr);
|
||||
|
||||
if (apselsave != apsel)
|
||||
dap_ap_select(swjdp, apselsave);
|
||||
@@ -796,7 +796,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command)
|
||||
*/
|
||||
COMMAND_HANDLER(handle_dap_apid_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7m_common *armv7m = target_to_armv7m(target);
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
|
||||
@@ -805,7 +805,7 @@ COMMAND_HANDLER(handle_dap_apid_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_apsel_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7m_common *armv7m = target_to_armv7m(target);
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
|
||||
@@ -814,7 +814,7 @@ COMMAND_HANDLER(handle_dap_apsel_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_memaccess_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7m_common *armv7m = target_to_armv7m(target);
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
|
||||
@@ -824,7 +824,7 @@ COMMAND_HANDLER(handle_dap_memaccess_command)
|
||||
|
||||
COMMAND_HANDLER(handle_dap_info_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7m_common *armv7m = target_to_armv7m(target);
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
uint32_t apsel;
|
||||
@@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_dap_info_command)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
return dap_info_command(cmd_ctx, swjdp, apsel);
|
||||
return dap_info_command(CMD_CTX, swjdp, apsel);
|
||||
}
|
||||
|
||||
/** Registers commands used to access DAP resources. */
|
||||
|
||||
@@ -1512,17 +1512,17 @@ static int cortex_a8_target_create(struct target *target, Jim_Interp *interp)
|
||||
|
||||
COMMAND_HANDLER(cortex_a8_handle_cache_info_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct armv7a_common *armv7a = target_to_armv7a(target);
|
||||
|
||||
return armv4_5_handle_cache_info_command(cmd_ctx,
|
||||
return armv4_5_handle_cache_info_command(CMD_CTX,
|
||||
&armv7a->armv4_5_mmu.armv4_5_cache);
|
||||
}
|
||||
|
||||
|
||||
COMMAND_HANDLER(cortex_a8_handle_dbginit_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
cortex_a8_init_debug_access(target);
|
||||
|
||||
|
||||
@@ -1769,13 +1769,13 @@ static int cortex_m3_verify_pointer(struct command_context *cmd_ctx,
|
||||
COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
|
||||
{
|
||||
int retval;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
|
||||
uint32_t address;
|
||||
unsigned long count = 1;
|
||||
struct arm_instruction cur_instruction;
|
||||
|
||||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
|
||||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -1788,7 +1788,7 @@ COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"usage: cortex_m3 disassemble <address> [<count>]");
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -1797,7 +1797,7 @@ COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
|
||||
retval = thumb2_opcode(target, address, &cur_instruction);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
command_print(cmd_ctx, "%s", cur_instruction.text);
|
||||
command_print(CMD_CTX, "%s", cur_instruction.text);
|
||||
address += cur_instruction.instruction_size;
|
||||
}
|
||||
|
||||
@@ -1820,13 +1820,14 @@ static const struct {
|
||||
|
||||
COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
|
||||
struct armv7m_common *armv7m = &cortex_m3->armv7m;
|
||||
struct swjdp_common *swjdp = &armv7m->swjdp_info;
|
||||
uint32_t demcr = 0;
|
||||
int retval;
|
||||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
|
||||
|
||||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -1868,25 +1869,27 @@ write:
|
||||
}
|
||||
|
||||
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++)
|
||||
command_print(cmd_ctx, "%9s: %s", vec_ids[i].name,
|
||||
{
|
||||
command_print(CMD_CTX, "%9s: %s", vec_ids[i].name,
|
||||
(demcr & vec_ids[i].mask) ? "catch" : "ignore");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
|
||||
int retval;
|
||||
|
||||
retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
|
||||
retval = cortex_m3_verify_pointer(CMD_CTX, cortex_m3);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -1902,11 +1905,11 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: cortex_m3 maskisr ['on'|'off']");
|
||||
command_print(CMD_CTX, "usage: cortex_m3 maskisr ['on'|'off']");
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "cortex_m3 interrupt mask %s",
|
||||
command_print(CMD_CTX, "cortex_m3 interrupt mask %s",
|
||||
(cortex_m3->dcb_dhcsr & C_MASKINTS) ? "on" : "off");
|
||||
|
||||
return ERROR_OK;
|
||||
|
||||
@@ -370,14 +370,14 @@ COMMAND_HANDLER(handle_etb_config_command)
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
tap = jtag_tap_by_string(CMD_ARGV[1]);
|
||||
if (tap == NULL)
|
||||
{
|
||||
command_print(cmd_ctx, "ETB: TAP %s does not exist", CMD_ARGV[1]);
|
||||
command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
||||
194
src/target/etm.c
194
src/target/etm.c
@@ -1189,7 +1189,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
|
||||
tracemode = ETMV1_TRACE_DATA | ETMV1_TRACE_ADDR;
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[0]);
|
||||
return ERROR_INVALID_ARGUMENTS;
|
||||
}
|
||||
|
||||
@@ -1210,7 +1210,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
|
||||
tracemode |= ETMV1_CONTEXTID_32;
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[1]);
|
||||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[1]);
|
||||
return ERROR_INVALID_ARGUMENTS;
|
||||
}
|
||||
|
||||
@@ -1220,7 +1220,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
|
||||
tracemode |= 0;
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[2]);
|
||||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[2]);
|
||||
return ERROR_INVALID_ARGUMENTS;
|
||||
}
|
||||
|
||||
@@ -1230,7 +1230,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
|
||||
tracemode |= 0;
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "invalid option '%s'", CMD_ARGV[3]);
|
||||
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[3]);
|
||||
return ERROR_INVALID_ARGUMENTS;
|
||||
}
|
||||
|
||||
@@ -1246,18 +1246,18 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
|
||||
|
||||
COMMAND_HANDLER(handle_etm_tracemode_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct arm *arm = target_to_arm(target);
|
||||
struct etm_context *etm;
|
||||
|
||||
if (!is_arm(arm)) {
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm = arm->etm;
|
||||
if (!etm) {
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1271,7 +1271,7 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
|
||||
CALL_COMMAND_HANDLER(handle_etm_tracemode_command_update, &tracemode);
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx, "usage: configure trace mode "
|
||||
command_print(CMD_CTX, "usage: configure trace mode "
|
||||
"<none | data | address | all> "
|
||||
"<context id bits> <cycle accurate> <branch output>");
|
||||
return ERROR_FAIL;
|
||||
@@ -1282,56 +1282,56 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
|
||||
* or couldn't be written; display actual hardware state...
|
||||
*/
|
||||
|
||||
command_print(cmd_ctx, "current tracemode configuration:");
|
||||
command_print(CMD_CTX, "current tracemode configuration:");
|
||||
|
||||
switch (tracemode & ETMV1_TRACE_MASK)
|
||||
{
|
||||
case ETMV1_TRACE_NONE:
|
||||
command_print(cmd_ctx, "data tracing: none");
|
||||
command_print(CMD_CTX, "data tracing: none");
|
||||
break;
|
||||
case ETMV1_TRACE_DATA:
|
||||
command_print(cmd_ctx, "data tracing: data only");
|
||||
command_print(CMD_CTX, "data tracing: data only");
|
||||
break;
|
||||
case ETMV1_TRACE_ADDR:
|
||||
command_print(cmd_ctx, "data tracing: address only");
|
||||
command_print(CMD_CTX, "data tracing: address only");
|
||||
break;
|
||||
case ETMV1_TRACE_DATA | ETMV1_TRACE_ADDR:
|
||||
command_print(cmd_ctx, "data tracing: address and data");
|
||||
command_print(CMD_CTX, "data tracing: address and data");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (tracemode & ETMV1_CONTEXTID_MASK)
|
||||
{
|
||||
case ETMV1_CONTEXTID_NONE:
|
||||
command_print(cmd_ctx, "contextid tracing: none");
|
||||
command_print(CMD_CTX, "contextid tracing: none");
|
||||
break;
|
||||
case ETMV1_CONTEXTID_8:
|
||||
command_print(cmd_ctx, "contextid tracing: 8 bit");
|
||||
command_print(CMD_CTX, "contextid tracing: 8 bit");
|
||||
break;
|
||||
case ETMV1_CONTEXTID_16:
|
||||
command_print(cmd_ctx, "contextid tracing: 16 bit");
|
||||
command_print(CMD_CTX, "contextid tracing: 16 bit");
|
||||
break;
|
||||
case ETMV1_CONTEXTID_32:
|
||||
command_print(cmd_ctx, "contextid tracing: 32 bit");
|
||||
command_print(CMD_CTX, "contextid tracing: 32 bit");
|
||||
break;
|
||||
}
|
||||
|
||||
if (tracemode & ETMV1_CYCLE_ACCURATE)
|
||||
{
|
||||
command_print(cmd_ctx, "cycle-accurate tracing enabled");
|
||||
command_print(CMD_CTX, "cycle-accurate tracing enabled");
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "cycle-accurate tracing disabled");
|
||||
command_print(CMD_CTX, "cycle-accurate tracing disabled");
|
||||
}
|
||||
|
||||
if (tracemode & ETMV1_BRANCH_OUTPUT)
|
||||
{
|
||||
command_print(cmd_ctx, "full branch address output enabled");
|
||||
command_print(CMD_CTX, "full branch address output enabled");
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "full branch address output disabled");
|
||||
command_print(CMD_CTX, "full branch address output disabled");
|
||||
}
|
||||
|
||||
/* only update ETM_CTRL register if tracemode changed */
|
||||
@@ -1386,7 +1386,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm)) {
|
||||
command_print(cmd_ctx, "target '%s' is '%s'; not an ARM",
|
||||
command_print(CMD_CTX, "target '%s' is '%s'; not an ARM",
|
||||
target->cmd_name, target_get_name(target));
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -1437,7 +1437,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
portmode |= ETM_PORT_2BIT;
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"unsupported ETM port width '%s'", CMD_ARGV[1]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -1456,7 +1456,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "unsupported ETM port mode '%s', must be 'normal', 'multiplexed' or 'demultiplexed'", CMD_ARGV[2]);
|
||||
command_print(CMD_CTX, "unsupported ETM port mode '%s', must be 'normal', 'multiplexed' or 'demultiplexed'", CMD_ARGV[2]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1470,7 +1470,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "unsupported ETM port clocking '%s', must be 'full' or 'half'", CMD_ARGV[3]);
|
||||
command_print(CMD_CTX, "unsupported ETM port clocking '%s', must be 'full' or 'half'", CMD_ARGV[3]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1485,7 +1485,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
if (strcmp(CMD_ARGV[4], etm_capture_drivers[i]->name) == 0)
|
||||
{
|
||||
int retval;
|
||||
if ((retval = etm_capture_drivers[i]->register_commands(cmd_ctx)) != ERROR_OK)
|
||||
if ((retval = etm_capture_drivers[i]->register_commands(CMD_CTX)) != ERROR_OK)
|
||||
{
|
||||
free(etm_ctx);
|
||||
return retval;
|
||||
@@ -1513,7 +1513,7 @@ COMMAND_HANDLER(handle_etm_config_command)
|
||||
|
||||
arm->etm = etm_ctx;
|
||||
|
||||
return etm_register_user_commands(cmd_ctx);
|
||||
return etm_register_user_commands(CMD_CTX);
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_etm_info_command)
|
||||
@@ -1525,49 +1525,49 @@ COMMAND_HANDLER(handle_etm_info_command)
|
||||
int max_port_size;
|
||||
uint32_t config;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm = arm->etm;
|
||||
if (!etm)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "ETM v%d.%d",
|
||||
command_print(CMD_CTX, "ETM v%d.%d",
|
||||
etm->bcd_vers >> 4, etm->bcd_vers & 0xf);
|
||||
command_print(cmd_ctx, "pairs of address comparators: %i",
|
||||
command_print(CMD_CTX, "pairs of address comparators: %i",
|
||||
(int) (etm->config >> 0) & 0x0f);
|
||||
command_print(cmd_ctx, "data comparators: %i",
|
||||
command_print(CMD_CTX, "data comparators: %i",
|
||||
(int) (etm->config >> 4) & 0x0f);
|
||||
command_print(cmd_ctx, "memory map decoders: %i",
|
||||
command_print(CMD_CTX, "memory map decoders: %i",
|
||||
(int) (etm->config >> 8) & 0x1f);
|
||||
command_print(cmd_ctx, "number of counters: %i",
|
||||
command_print(CMD_CTX, "number of counters: %i",
|
||||
(int) (etm->config >> 13) & 0x07);
|
||||
command_print(cmd_ctx, "sequencer %spresent",
|
||||
command_print(CMD_CTX, "sequencer %spresent",
|
||||
(int) (etm->config & (1 << 16)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "number of ext. inputs: %i",
|
||||
command_print(CMD_CTX, "number of ext. inputs: %i",
|
||||
(int) (etm->config >> 17) & 0x07);
|
||||
command_print(cmd_ctx, "number of ext. outputs: %i",
|
||||
command_print(CMD_CTX, "number of ext. outputs: %i",
|
||||
(int) (etm->config >> 20) & 0x07);
|
||||
command_print(cmd_ctx, "FIFO full %spresent",
|
||||
command_print(CMD_CTX, "FIFO full %spresent",
|
||||
(int) (etm->config & (1 << 23)) ? "" : "not ");
|
||||
if (etm->bcd_vers < 0x20)
|
||||
command_print(cmd_ctx, "protocol version: %i",
|
||||
command_print(CMD_CTX, "protocol version: %i",
|
||||
(int) (etm->config >> 28) & 0x07);
|
||||
else {
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"coprocessor and memory access %ssupported",
|
||||
(etm->config & (1 << 26)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "trace start/stop %spresent",
|
||||
command_print(CMD_CTX, "trace start/stop %spresent",
|
||||
(etm->config & (1 << 26)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "number of context comparators: %i",
|
||||
command_print(CMD_CTX, "number of context comparators: %i",
|
||||
(int) (etm->config >> 24) & 0x03);
|
||||
}
|
||||
|
||||
@@ -1619,30 +1619,30 @@ COMMAND_HANDLER(handle_etm_info_command)
|
||||
LOG_ERROR("Illegal max_port_size");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
command_print(cmd_ctx, "max. port size: %i", max_port_size);
|
||||
command_print(CMD_CTX, "max. port size: %i", max_port_size);
|
||||
|
||||
if (etm->bcd_vers < 0x30) {
|
||||
command_print(cmd_ctx, "half-rate clocking %ssupported",
|
||||
command_print(CMD_CTX, "half-rate clocking %ssupported",
|
||||
(config & (1 << 3)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "full-rate clocking %ssupported",
|
||||
command_print(CMD_CTX, "full-rate clocking %ssupported",
|
||||
(config & (1 << 4)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "normal trace format %ssupported",
|
||||
command_print(CMD_CTX, "normal trace format %ssupported",
|
||||
(config & (1 << 5)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "multiplex trace format %ssupported",
|
||||
command_print(CMD_CTX, "multiplex trace format %ssupported",
|
||||
(config & (1 << 6)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "demultiplex trace format %ssupported",
|
||||
command_print(CMD_CTX, "demultiplex trace format %ssupported",
|
||||
(config & (1 << 7)) ? "" : "not ");
|
||||
} else {
|
||||
/* REVISIT show which size and format are selected ... */
|
||||
command_print(cmd_ctx, "current port size %ssupported",
|
||||
command_print(CMD_CTX, "current port size %ssupported",
|
||||
(config & (1 << 10)) ? "" : "not ");
|
||||
command_print(cmd_ctx, "current trace format %ssupported",
|
||||
command_print(CMD_CTX, "current trace format %ssupported",
|
||||
(config & (1 << 11)) ? "" : "not ");
|
||||
}
|
||||
if (etm->bcd_vers >= 0x21)
|
||||
command_print(cmd_ctx, "fetch comparisons %ssupported",
|
||||
command_print(CMD_CTX, "fetch comparisons %ssupported",
|
||||
(config & (1 << 17)) ? "not " : "");
|
||||
command_print(cmd_ctx, "FIFO full %ssupported",
|
||||
command_print(CMD_CTX, "FIFO full %ssupported",
|
||||
(config & (1 << 8)) ? "" : "not ");
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -1655,18 +1655,18 @@ COMMAND_HANDLER(handle_etm_status_command)
|
||||
struct etm_context *etm;
|
||||
trace_status_t trace_status;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm = arm->etm;
|
||||
if (!etm)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1680,7 +1680,7 @@ COMMAND_HANDLER(handle_etm_status_command)
|
||||
if (etm_get_reg(reg) == ERROR_OK) {
|
||||
unsigned s = buf_get_u32(reg->value, 0, reg->size);
|
||||
|
||||
command_print(cmd_ctx, "etm: %s%s%s%s",
|
||||
command_print(CMD_CTX, "etm: %s%s%s%s",
|
||||
/* bit(1) == progbit */
|
||||
(etm->bcd_vers >= 0x12)
|
||||
? ((s & (1 << 1))
|
||||
@@ -1699,7 +1699,7 @@ COMMAND_HANDLER(handle_etm_status_command)
|
||||
trace_status = etm->capture_driver->status(etm);
|
||||
if (trace_status == TRACE_IDLE)
|
||||
{
|
||||
command_print(cmd_ctx, "%s: idle", etm->capture_driver->name);
|
||||
command_print(CMD_CTX, "%s: idle", etm->capture_driver->name);
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -1708,7 +1708,7 @@ COMMAND_HANDLER(handle_etm_status_command)
|
||||
static char *overflowed = ", overflowed";
|
||||
static char *triggered = ", triggered";
|
||||
|
||||
command_print(cmd_ctx, "%s: trace collection%s%s%s",
|
||||
command_print(CMD_CTX, "%s: trace collection%s%s%s",
|
||||
etm->capture_driver->name,
|
||||
(trace_status & TRACE_RUNNING) ? running : completed,
|
||||
(trace_status & TRACE_OVERFLOWED) ? overflowed : "",
|
||||
@@ -1716,7 +1716,7 @@ COMMAND_HANDLER(handle_etm_status_command)
|
||||
|
||||
if (etm->trace_depth > 0)
|
||||
{
|
||||
command_print(cmd_ctx, "%i frames of trace data read",
|
||||
command_print(CMD_CTX, "%i frames of trace data read",
|
||||
(int)(etm->trace_depth));
|
||||
}
|
||||
}
|
||||
@@ -1732,22 +1732,22 @@ COMMAND_HANDLER(handle_etm_image_command)
|
||||
|
||||
if (CMD_ARGC < 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: etm image <file> [base address] [type]");
|
||||
command_print(CMD_CTX, "usage: etm image <file> [base address] [type]");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1755,7 +1755,7 @@ COMMAND_HANDLER(handle_etm_image_command)
|
||||
{
|
||||
image_close(etm_ctx->image);
|
||||
free(etm_ctx->image);
|
||||
command_print(cmd_ctx, "previously loaded image found and closed");
|
||||
command_print(CMD_CTX, "previously loaded image found and closed");
|
||||
}
|
||||
|
||||
etm_ctx->image = malloc(sizeof(struct image));
|
||||
@@ -1793,35 +1793,35 @@ COMMAND_HANDLER(handle_etm_dump_command)
|
||||
|
||||
if (CMD_ARGC != 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: etm dump <file>");
|
||||
command_print(CMD_CTX, "usage: etm dump <file>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (etm_ctx->capture_driver->status == TRACE_IDLE)
|
||||
{
|
||||
command_print(cmd_ctx, "trace capture wasn't enabled, no trace data captured");
|
||||
command_print(CMD_CTX, "trace capture wasn't enabled, no trace data captured");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING)
|
||||
{
|
||||
/* TODO: if on-the-fly capture is to be supported, this needs to be changed */
|
||||
command_print(cmd_ctx, "trace capture not completed");
|
||||
command_print(CMD_CTX, "trace capture not completed");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1861,28 +1861,28 @@ COMMAND_HANDLER(handle_etm_load_command)
|
||||
|
||||
if (CMD_ARGC != 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: etm load <file>");
|
||||
command_print(CMD_CTX, "usage: etm load <file>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING)
|
||||
{
|
||||
command_print(cmd_ctx, "trace capture running, stop first");
|
||||
command_print(CMD_CTX, "trace capture running, stop first");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1893,7 +1893,7 @@ COMMAND_HANDLER(handle_etm_load_command)
|
||||
|
||||
if (file.size % 4)
|
||||
{
|
||||
command_print(cmd_ctx, "size isn't a multiple of 4, no valid trace data");
|
||||
command_print(CMD_CTX, "size isn't a multiple of 4, no valid trace data");
|
||||
fileio_close(&file);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -1914,7 +1914,7 @@ COMMAND_HANDLER(handle_etm_load_command)
|
||||
etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth);
|
||||
if (etm_ctx->trace_data == NULL)
|
||||
{
|
||||
command_print(cmd_ctx, "not enough memory to perform operation");
|
||||
command_print(CMD_CTX, "not enough memory to perform operation");
|
||||
fileio_close(&file);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
@@ -1941,18 +1941,18 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command)
|
||||
struct arm *arm;
|
||||
struct etm_context *etm_ctx;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -1963,7 +1963,7 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command)
|
||||
|
||||
if ((new_value < 2) || (new_value > 100))
|
||||
{
|
||||
command_print(cmd_ctx, "valid settings are 2%% to 100%%");
|
||||
command_print(CMD_CTX, "valid settings are 2%% to 100%%");
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -1971,7 +1971,7 @@ COMMAND_HANDLER(handle_etm_trigger_percent_command)
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent)));
|
||||
command_print(CMD_CTX, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent)));
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -1983,18 +1983,18 @@ COMMAND_HANDLER(handle_etm_start_command)
|
||||
struct etm_context *etm_ctx;
|
||||
struct reg *etm_ctrl_reg;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -2031,18 +2031,18 @@ COMMAND_HANDLER(handle_etm_stop_command)
|
||||
struct etm_context *etm_ctx;
|
||||
struct reg *etm_ctrl_reg;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -2070,36 +2070,36 @@ COMMAND_HANDLER(handle_etm_analyze_command)
|
||||
struct etm_context *etm_ctx;
|
||||
int retval;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "ETM: current target isn't an ARM");
|
||||
command_print(CMD_CTX, "ETM: current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
etm_ctx = arm->etm;
|
||||
if (!etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if ((retval = etmv1_analyze_trace(etm_ctx, cmd_ctx)) != ERROR_OK)
|
||||
if ((retval = etmv1_analyze_trace(etm_ctx, CMD_CTX)) != ERROR_OK)
|
||||
{
|
||||
switch (retval)
|
||||
{
|
||||
case ERROR_ETM_ANALYSIS_FAILED:
|
||||
command_print(cmd_ctx, "further analysis failed (corrupted trace data or just end of data");
|
||||
command_print(CMD_CTX, "further analysis failed (corrupted trace data or just end of data");
|
||||
break;
|
||||
case ERROR_TRACE_INSTRUCTION_UNAVAILABLE:
|
||||
command_print(cmd_ctx, "no instruction for current address available, analysis aborted");
|
||||
command_print(CMD_CTX, "no instruction for current address available, analysis aborted");
|
||||
break;
|
||||
case ERROR_TRACE_IMAGE_UNAVAILABLE:
|
||||
command_print(cmd_ctx, "no image available for trace analysis");
|
||||
command_print(CMD_CTX, "no image available for trace analysis");
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx, "unknown error: %i", retval);
|
||||
command_print(CMD_CTX, "unknown error: %i", retval);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -41,7 +41,7 @@ COMMAND_HANDLER(handle_etm_dummy_config_command)
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "target '%s' isn't an ARM", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "target '%s' isn't an ARM", CMD_ARGV[0]);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
||||
@@ -300,11 +300,11 @@ COMMAND_HANDLER(handle_oocd_trace_config_command)
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -333,24 +333,24 @@ COMMAND_HANDLER(handle_oocd_trace_status_command)
|
||||
struct oocd_trace *oocd_trace;
|
||||
uint32_t status;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (!arm->etm)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0)
|
||||
{
|
||||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -359,9 +359,9 @@ COMMAND_HANDLER(handle_oocd_trace_status_command)
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
|
||||
|
||||
if (status & 0x8)
|
||||
command_print(cmd_ctx, "trace clock locked");
|
||||
command_print(CMD_CTX, "trace clock locked");
|
||||
else
|
||||
command_print(cmd_ctx, "no trace clock");
|
||||
command_print(CMD_CTX, "no trace clock");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -374,24 +374,24 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command)
|
||||
size_t bytes_written;
|
||||
uint8_t cmd_array[1];
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
|
||||
arm = target_to_arm(target);
|
||||
if (!is_arm(arm))
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM");
|
||||
command_print(CMD_CTX, "current target isn't an ARM");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (!arm->etm)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
command_print(CMD_CTX, "current target doesn't have an ETM configured");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0)
|
||||
{
|
||||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
@@ -401,7 +401,7 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command)
|
||||
|
||||
bytes_written = write(oocd_trace->tty_fd, cmd_array, 1);
|
||||
|
||||
command_print(cmd_ctx, "requesting traceclock resync");
|
||||
command_print(CMD_CTX, "requesting traceclock resync");
|
||||
LOG_DEBUG("resyncing traceclk pll");
|
||||
|
||||
return ERROR_OK;
|
||||
|
||||
@@ -1652,24 +1652,24 @@ COMMAND_HANDLER(handle_targets_command)
|
||||
{
|
||||
target = get_target(CMD_ARGV[0]);
|
||||
if (target == NULL) {
|
||||
command_print(cmd_ctx,"Target: %s is unknown, try one of:\n", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX,"Target: %s is unknown, try one of:\n", CMD_ARGV[0]);
|
||||
goto DumpTargets;
|
||||
}
|
||||
if (!target->tap->enabled) {
|
||||
command_print(cmd_ctx,"Target: TAP %s is disabled, "
|
||||
command_print(CMD_CTX,"Target: TAP %s is disabled, "
|
||||
"can't be the current target\n",
|
||||
target->tap->dotted_name);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
cmd_ctx->current_target = target->target_number;
|
||||
CMD_CTX->current_target = target->target_number;
|
||||
return ERROR_OK;
|
||||
}
|
||||
DumpTargets:
|
||||
|
||||
target = all_targets;
|
||||
command_print(cmd_ctx, " TargetName Type Endian TapName State ");
|
||||
command_print(cmd_ctx, "-- ------------------ ---------- ------ ------------------ ------------");
|
||||
command_print(CMD_CTX, " TargetName Type Endian TapName State ");
|
||||
command_print(CMD_CTX, "-- ------------------ ---------- ------ ------------------ ------------");
|
||||
while (target)
|
||||
{
|
||||
const char *state;
|
||||
@@ -1680,11 +1680,11 @@ DumpTargets:
|
||||
else
|
||||
state = "tap-disabled";
|
||||
|
||||
if (cmd_ctx->current_target == target->target_number)
|
||||
if (CMD_CTX->current_target == target->target_number)
|
||||
marker = '*';
|
||||
|
||||
/* keep columns lined up to match the headers above */
|
||||
command_print(cmd_ctx, "%2d%c %-18s %-10s %-6s %-18s %s",
|
||||
command_print(CMD_CTX, "%2d%c %-18s %-10s %-6s %-18s %s",
|
||||
target->target_number,
|
||||
marker,
|
||||
target->cmd_name,
|
||||
@@ -1865,7 +1865,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
|
||||
LOG_DEBUG("-");
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
target = get_current_target(CMD_CTX);
|
||||
|
||||
/* list all available registers for the current target */
|
||||
if (CMD_ARGC == 0)
|
||||
@@ -1877,7 +1877,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
{
|
||||
int i;
|
||||
|
||||
command_print(cmd_ctx, "===== %s", cache->name);
|
||||
command_print(CMD_CTX, "===== %s", cache->name);
|
||||
|
||||
for (i = 0, reg = cache->reg_list;
|
||||
i < cache->num_regs;
|
||||
@@ -1887,7 +1887,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
if (reg->valid) {
|
||||
value = buf_to_str(reg->value,
|
||||
reg->size, 16);
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"(%i) %s (/%" PRIu32 "): 0x%s%s",
|
||||
count, reg->name,
|
||||
reg->size, value,
|
||||
@@ -1896,7 +1896,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
: "");
|
||||
free(value);
|
||||
} else {
|
||||
command_print(cmd_ctx, "(%i) %s (/%" PRIu32 ")",
|
||||
command_print(CMD_CTX, "(%i) %s (/%" PRIu32 ")",
|
||||
count, reg->name,
|
||||
reg->size) ;
|
||||
}
|
||||
@@ -1933,7 +1933,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
|
||||
if (!reg)
|
||||
{
|
||||
command_print(cmd_ctx, "%i is out of bounds, the current target has only %i registers (0 - %i)", num, count, count - 1);
|
||||
command_print(CMD_CTX, "%i is out of bounds, the current target has only %i registers (0 - %i)", num, count, count - 1);
|
||||
return ERROR_OK;
|
||||
}
|
||||
} else /* access a single register by its name */
|
||||
@@ -1942,7 +1942,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
|
||||
if (!reg)
|
||||
{
|
||||
command_print(cmd_ctx, "register %s not found in current target", CMD_ARGV[0]);
|
||||
command_print(CMD_CTX, "register %s not found in current target", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
}
|
||||
@@ -1958,7 +1958,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
reg->type->get(reg);
|
||||
}
|
||||
value = buf_to_str(reg->value, reg->size, 16);
|
||||
command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
|
||||
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
|
||||
free(value);
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -1972,7 +1972,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
reg->type->set(reg, buf);
|
||||
|
||||
value = buf_to_str(reg->value, reg->size, 16);
|
||||
command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
|
||||
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
|
||||
free(value);
|
||||
|
||||
free(buf);
|
||||
@@ -1980,7 +1980,7 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "usage: reg <#|name> [value]");
|
||||
command_print(CMD_CTX, "usage: reg <#|name> [value]");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -1988,13 +1988,13 @@ COMMAND_HANDLER(handle_reg_command)
|
||||
COMMAND_HANDLER(handle_poll_command)
|
||||
{
|
||||
int retval = ERROR_OK;
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC == 0)
|
||||
{
|
||||
command_print(cmd_ctx, "background polling: %s",
|
||||
command_print(CMD_CTX, "background polling: %s",
|
||||
jtag_poll_get_enabled() ? "on" : "off");
|
||||
command_print(cmd_ctx, "TAP: %s (%s)",
|
||||
command_print(CMD_CTX, "TAP: %s (%s)",
|
||||
target->tap->dotted_name,
|
||||
target->tap->enabled ? "enabled" : "disabled");
|
||||
if (!target->tap->enabled)
|
||||
@@ -2017,7 +2017,7 @@ COMMAND_HANDLER(handle_poll_command)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "arg is \"on\" or \"off\"");
|
||||
command_print(CMD_CTX, "arg is \"on\" or \"off\"");
|
||||
}
|
||||
} else
|
||||
{
|
||||
@@ -2038,14 +2038,14 @@ COMMAND_HANDLER(handle_wait_halt_command)
|
||||
int retval = parse_uint(CMD_ARGV[0], &ms);
|
||||
if (ERROR_OK != retval)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: %s [seconds]", CMD_NAME);
|
||||
command_print(CMD_CTX, "usage: %s [seconds]", CMD_NAME);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
// convert seconds (given) to milliseconds (needed)
|
||||
ms *= 1000;
|
||||
}
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
return target_wait_state(target, TARGET_HALTED, ms);
|
||||
}
|
||||
|
||||
@@ -2098,7 +2098,7 @@ COMMAND_HANDLER(handle_halt_command)
|
||||
{
|
||||
LOG_DEBUG("-");
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
int retval = target_halt(target);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
@@ -2118,7 +2118,7 @@ COMMAND_HANDLER(handle_halt_command)
|
||||
|
||||
COMMAND_HANDLER(handle_soft_reset_halt_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
LOG_USER("requesting target halt and executing a soft reset");
|
||||
|
||||
@@ -2144,7 +2144,7 @@ COMMAND_HANDLER(handle_reset_command)
|
||||
}
|
||||
|
||||
/* reset *all* targets */
|
||||
return target_process_reset(cmd_ctx, reset_mode);
|
||||
return target_process_reset(CMD_CTX, reset_mode);
|
||||
}
|
||||
|
||||
|
||||
@@ -2154,7 +2154,7 @@ COMMAND_HANDLER(handle_resume_command)
|
||||
if (CMD_ARGC > 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
target_handle_event(target, TARGET_EVENT_OLD_pre_resume);
|
||||
|
||||
/* with no CMD_ARGV, resume from current pc, addr = 0,
|
||||
@@ -2188,7 +2188,7 @@ COMMAND_HANDLER(handle_step_command)
|
||||
current_pc = 0;
|
||||
}
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
return target->type->step(target, current_pc, addr, 1);
|
||||
}
|
||||
@@ -2282,10 +2282,10 @@ COMMAND_HANDLER(handle_md_command)
|
||||
|
||||
uint8_t *buffer = calloc(count, size);
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
int retval = fn(target, address, size, count, buffer);
|
||||
if (ERROR_OK == retval)
|
||||
handle_md_output(cmd_ctx, target, address, size, count, buffer);
|
||||
handle_md_output(CMD_CTX, target, address, size, count, buffer);
|
||||
|
||||
free(buffer);
|
||||
|
||||
@@ -2324,7 +2324,7 @@ COMMAND_HANDLER(handle_mw_command)
|
||||
if (CMD_ARGC == 3)
|
||||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], count);
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
unsigned wordsize;
|
||||
uint8_t value_buf[4];
|
||||
switch (cmd_name[6])
|
||||
@@ -2409,7 +2409,7 @@ COMMAND_HANDLER(handle_load_image_command)
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
struct duration bench;
|
||||
duration_start(&bench);
|
||||
@@ -2426,7 +2426,7 @@ COMMAND_HANDLER(handle_load_image_command)
|
||||
buffer = malloc(image.sections[i].size);
|
||||
if (buffer == NULL)
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"error allocating buffer for section (%d bytes)",
|
||||
(int)(image.sections[i].size));
|
||||
break;
|
||||
@@ -2464,7 +2464,7 @@ COMMAND_HANDLER(handle_load_image_command)
|
||||
break;
|
||||
}
|
||||
image_size += length;
|
||||
command_print(cmd_ctx, "%u bytes written at address 0x%8.8" PRIx32 "",
|
||||
command_print(CMD_CTX, "%u bytes written at address 0x%8.8" PRIx32 "",
|
||||
(unsigned int)length,
|
||||
image.sections[i].base_address + offset);
|
||||
}
|
||||
@@ -2474,7 +2474,7 @@ COMMAND_HANDLER(handle_load_image_command)
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK))
|
||||
{
|
||||
command_print(cmd_ctx, "downloaded %" PRIu32 " bytes "
|
||||
command_print(CMD_CTX, "downloaded %" PRIu32 " bytes "
|
||||
"in %fs (%0.3f kb/s)", image_size,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, image_size));
|
||||
}
|
||||
@@ -2493,11 +2493,11 @@ COMMAND_HANDLER(handle_dump_image_command)
|
||||
int retvaltemp;
|
||||
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC != 3)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: dump_image <filename> <address> <size>");
|
||||
command_print(CMD_CTX, "usage: dump_image <filename> <address> <size>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -2540,7 +2540,7 @@ COMMAND_HANDLER(handle_dump_image_command)
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK))
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"dumped %zu bytes in %fs (%0.3f kb/s)", fileio.size,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, fileio.size));
|
||||
}
|
||||
@@ -2560,7 +2560,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
|
||||
struct image image;
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC < 1)
|
||||
{
|
||||
@@ -2603,7 +2603,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
buffer = malloc(image.sections[i].size);
|
||||
if (buffer == NULL)
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"error allocating buffer for section (%d bytes)",
|
||||
(int)(image.sections[i].size));
|
||||
break;
|
||||
@@ -2631,7 +2631,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
/* failed crc checksum, fall back to a binary compare */
|
||||
uint8_t *data;
|
||||
|
||||
command_print(cmd_ctx, "checksum mismatch - attempting binary compare");
|
||||
command_print(CMD_CTX, "checksum mismatch - attempting binary compare");
|
||||
|
||||
data = (uint8_t*)malloc(buf_cnt);
|
||||
|
||||
@@ -2651,7 +2651,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
{
|
||||
if (data[t] != buffer[t])
|
||||
{
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n",
|
||||
(unsigned)(t + image.sections[i].base_address),
|
||||
data[t],
|
||||
@@ -2672,7 +2672,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
}
|
||||
} else
|
||||
{
|
||||
command_print(cmd_ctx, "address 0x%08" PRIx32 " length 0x%08zx",
|
||||
command_print(CMD_CTX, "address 0x%08" PRIx32 " length 0x%08zx",
|
||||
image.sections[i].base_address,
|
||||
buf_cnt);
|
||||
}
|
||||
@@ -2683,7 +2683,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, int verify)
|
||||
done:
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK))
|
||||
{
|
||||
command_print(cmd_ctx, "verified %" PRIu32 " bytes "
|
||||
command_print(CMD_CTX, "verified %" PRIu32 " bytes "
|
||||
"in %fs (%0.3f kb/s)", image_size,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, image_size));
|
||||
}
|
||||
@@ -2746,11 +2746,11 @@ static int handle_bp_command_set(struct command_context *cmd_ctx,
|
||||
COMMAND_HANDLER(handle_bp_command)
|
||||
{
|
||||
if (CMD_ARGC == 0)
|
||||
return handle_bp_command_list(cmd_ctx);
|
||||
return handle_bp_command_list(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC < 2 || CMD_ARGC > 3)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: bp <address> <length> ['hw']");
|
||||
command_print(CMD_CTX, "usage: bp <address> <length> ['hw']");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
@@ -2768,7 +2768,7 @@ COMMAND_HANDLER(handle_bp_command)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
return handle_bp_command_set(cmd_ctx, addr, length, hw);
|
||||
return handle_bp_command_set(CMD_CTX, addr, length, hw);
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_rbp_command)
|
||||
@@ -2779,7 +2779,7 @@ COMMAND_HANDLER(handle_rbp_command)
|
||||
uint32_t addr;
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
breakpoint_remove(target, addr);
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -2787,7 +2787,7 @@ COMMAND_HANDLER(handle_rbp_command)
|
||||
|
||||
COMMAND_HANDLER(handle_wp_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC == 0)
|
||||
{
|
||||
@@ -2795,7 +2795,7 @@ COMMAND_HANDLER(handle_wp_command)
|
||||
|
||||
while (watchpoint)
|
||||
{
|
||||
command_print(cmd_ctx, "address: 0x%8.8" PRIx32
|
||||
command_print(CMD_CTX, "address: 0x%8.8" PRIx32
|
||||
", len: 0x%8.8" PRIx32
|
||||
", r/w/a: %i, value: 0x%8.8" PRIx32
|
||||
", mask: 0x%8.8" PRIx32,
|
||||
@@ -2846,7 +2846,7 @@ COMMAND_HANDLER(handle_wp_command)
|
||||
break;
|
||||
|
||||
default:
|
||||
command_print(cmd_ctx, "usage: wp [address length "
|
||||
command_print(CMD_CTX, "usage: wp [address length "
|
||||
"[(r|w|a) [value [mask]]]]");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
@@ -2867,7 +2867,7 @@ COMMAND_HANDLER(handle_rwp_command)
|
||||
uint32_t addr;
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], addr);
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
watchpoint_remove(target, addr);
|
||||
|
||||
return ERROR_OK;
|
||||
@@ -2889,10 +2889,10 @@ COMMAND_HANDLER(handle_virt2phys_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], va);
|
||||
uint32_t pa;
|
||||
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
int retval = target->type->virt2phys(target, va, &pa);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(cmd_ctx, "Physical address 0x%08" PRIx32 "", pa);
|
||||
command_print(CMD_CTX, "Physical address 0x%08" PRIx32 "", pa);
|
||||
|
||||
return retval;
|
||||
}
|
||||
@@ -3016,7 +3016,7 @@ static void writeGmon(uint32_t *samples, uint32_t sampleNum, const char *filenam
|
||||
/* profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC */
|
||||
COMMAND_HANDLER(handle_profile_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct timeval timeout, now;
|
||||
|
||||
gettimeofday(&timeout, NULL);
|
||||
@@ -3029,7 +3029,7 @@ COMMAND_HANDLER(handle_profile_command)
|
||||
|
||||
timeval_add_time(&timeout, offset, 0);
|
||||
|
||||
command_print(cmd_ctx, "Starting profiling. Halting and resuming the target as often as we can...");
|
||||
command_print(CMD_CTX, "Starting profiling. Halting and resuming the target as often as we can...");
|
||||
|
||||
static const int maxSample = 10000;
|
||||
uint32_t *samples = malloc(sizeof(uint32_t)*maxSample);
|
||||
@@ -3061,7 +3061,7 @@ COMMAND_HANDLER(handle_profile_command)
|
||||
}
|
||||
} else
|
||||
{
|
||||
command_print(cmd_ctx, "Target not halted or running");
|
||||
command_print(CMD_CTX, "Target not halted or running");
|
||||
retval = ERROR_OK;
|
||||
break;
|
||||
}
|
||||
@@ -3073,7 +3073,7 @@ COMMAND_HANDLER(handle_profile_command)
|
||||
gettimeofday(&now, NULL);
|
||||
if ((numSamples >= maxSample) || ((now.tv_sec >= timeout.tv_sec) && (now.tv_usec >= timeout.tv_usec)))
|
||||
{
|
||||
command_print(cmd_ctx, "Profiling completed. %d samples.", numSamples);
|
||||
command_print(CMD_CTX, "Profiling completed. %d samples.", numSamples);
|
||||
if ((retval = target_poll(target)) != ERROR_OK)
|
||||
{
|
||||
free(samples);
|
||||
@@ -3089,7 +3089,7 @@ COMMAND_HANDLER(handle_profile_command)
|
||||
return retval;
|
||||
}
|
||||
writeGmon(samples, numSamples, CMD_ARGV[1]);
|
||||
command_print(cmd_ctx, "Wrote %s", CMD_ARGV[1]);
|
||||
command_print(CMD_CTX, "Wrote %s", CMD_ARGV[1]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -4571,7 +4571,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
|
||||
buffer = malloc(image.sections[i].size);
|
||||
if (buffer == NULL)
|
||||
{
|
||||
command_print(cmd_ctx, "error allocating buffer for section (%d bytes)",
|
||||
command_print(CMD_CTX, "error allocating buffer for section (%d bytes)",
|
||||
(int)(image.sections[i].size));
|
||||
break;
|
||||
}
|
||||
@@ -4614,7 +4614,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
|
||||
fastload[i].length = length;
|
||||
|
||||
image_size += length;
|
||||
command_print(cmd_ctx, "%u bytes written at address 0x%8.8x",
|
||||
command_print(CMD_CTX, "%u bytes written at address 0x%8.8x",
|
||||
(unsigned int)length,
|
||||
((unsigned int)(image.sections[i].base_address + offset)));
|
||||
}
|
||||
@@ -4624,11 +4624,11 @@ COMMAND_HANDLER(handle_fast_load_image_command)
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK))
|
||||
{
|
||||
command_print(cmd_ctx, "Loaded %" PRIu32 " bytes "
|
||||
command_print(CMD_CTX, "Loaded %" PRIu32 " bytes "
|
||||
"in %fs (%0.3f kb/s)", image_size,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, image_size));
|
||||
|
||||
command_print(cmd_ctx,
|
||||
command_print(CMD_CTX,
|
||||
"WARNING: image has not been loaded to target!"
|
||||
"You can issue a 'fast_load' to finish loading.");
|
||||
}
|
||||
@@ -4658,8 +4658,8 @@ COMMAND_HANDLER(handle_fast_load_command)
|
||||
int retval = ERROR_OK;
|
||||
for (i = 0; i < fastload_num;i++)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x",
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
command_print(CMD_CTX, "Write to 0x%08x, length 0x%08x",
|
||||
(unsigned int)(fastload[i].address),
|
||||
(unsigned int)(fastload[i].length));
|
||||
if (retval == ERROR_OK)
|
||||
@@ -4669,7 +4669,7 @@ COMMAND_HANDLER(handle_fast_load_command)
|
||||
size += fastload[i].length;
|
||||
}
|
||||
int after = timeval_ms();
|
||||
command_print(cmd_ctx, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
|
||||
command_print(CMD_CTX, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
@@ -260,12 +260,12 @@ int delete_debug_msg_receiver(struct command_context *cmd_ctx, struct target *ta
|
||||
|
||||
COMMAND_HANDLER(handle_target_request_debugmsgs_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
int receiving = 0;
|
||||
|
||||
/* see if reciever is already registered */
|
||||
if (find_debug_msg_receiver(cmd_ctx, target) != NULL)
|
||||
if (find_debug_msg_receiver(CMD_CTX, target) != NULL)
|
||||
receiving = 1;
|
||||
|
||||
if (CMD_ARGC > 0)
|
||||
@@ -276,7 +276,7 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command)
|
||||
if (!receiving)
|
||||
{
|
||||
receiving = 1;
|
||||
add_debug_msg_receiver(cmd_ctx, target);
|
||||
add_debug_msg_receiver(CMD_CTX, target);
|
||||
}
|
||||
charmsg_mode = !strcmp(CMD_ARGV[0], "charmsg");
|
||||
}
|
||||
@@ -286,16 +286,16 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command)
|
||||
if (receiving)
|
||||
{
|
||||
receiving = 0;
|
||||
delete_debug_msg_receiver(cmd_ctx, target);
|
||||
delete_debug_msg_receiver(CMD_CTX, target);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: target_request debugmsgs ['enable'|'disable'|'charmsg']");
|
||||
command_print(CMD_CTX, "usage: target_request debugmsgs ['enable'|'disable'|'charmsg']");
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "receiving debug messages from current target %s",
|
||||
command_print(CMD_CTX, "receiving debug messages from current target %s",
|
||||
(receiving) ? (charmsg_mode?"charmsg":"enabled") : "disabled");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -49,7 +49,7 @@ int trace_point(struct target *target, uint32_t number)
|
||||
|
||||
COMMAND_HANDLER(handle_trace_point_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct trace *trace = target->trace_info;
|
||||
|
||||
if (CMD_ARGC == 0)
|
||||
@@ -58,7 +58,7 @@ COMMAND_HANDLER(handle_trace_point_command)
|
||||
|
||||
for (i = 0; i < trace->num_trace_points; i++)
|
||||
{
|
||||
command_print(cmd_ctx, "trace point 0x%8.8" PRIx32 " (%lld times hit)",
|
||||
command_print(CMD_CTX, "trace point 0x%8.8" PRIx32 " (%lld times hit)",
|
||||
trace->trace_points[i].address,
|
||||
(long long)trace->trace_points[i].hit_counter);
|
||||
}
|
||||
@@ -97,7 +97,7 @@ COMMAND_HANDLER(handle_trace_point_command)
|
||||
|
||||
COMMAND_HANDLER(handle_trace_history_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct trace *trace = target->trace_info;
|
||||
|
||||
if (CMD_ARGC > 0)
|
||||
@@ -117,7 +117,7 @@ COMMAND_HANDLER(handle_trace_history_command)
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], trace->trace_history_size);
|
||||
trace->trace_history = malloc(sizeof(uint32_t) * trace->trace_history_size);
|
||||
|
||||
command_print(cmd_ctx, "new trace history size: %i", (int)(trace->trace_history_size));
|
||||
command_print(CMD_CTX, "new trace history size: %i", (int)(trace->trace_history_size));
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -126,7 +126,7 @@ COMMAND_HANDLER(handle_trace_history_command)
|
||||
uint32_t last = trace->trace_history_pos;
|
||||
|
||||
if (!trace->trace_history_size) {
|
||||
command_print(cmd_ctx, "trace history buffer is not allocated");
|
||||
command_print(CMD_CTX, "trace history buffer is not allocated");
|
||||
return ERROR_OK;
|
||||
}
|
||||
if (trace->trace_history_overflowed)
|
||||
@@ -141,14 +141,14 @@ COMMAND_HANDLER(handle_trace_history_command)
|
||||
{
|
||||
uint32_t address;
|
||||
address = trace->trace_points[trace->trace_history[i % trace->trace_history_size]].address;
|
||||
command_print(cmd_ctx, "trace point %i: 0x%8.8" PRIx32 "",
|
||||
command_print(CMD_CTX, "trace point %i: 0x%8.8" PRIx32 "",
|
||||
(int)(trace->trace_history[i % trace->trace_history_size]),
|
||||
address);
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "trace point %i: -not defined-", (int)(trace->trace_history[i % trace->trace_history_size]));
|
||||
command_print(CMD_CTX, "trace point %i: -not defined-", (int)(trace->trace_history[i % trace->trace_history_size]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -3008,7 +3008,7 @@ COMMAND_HANDLER(xscale_handle_debug_handler_command)
|
||||
}
|
||||
|
||||
xscale = target_to_xscale(target);
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -3047,7 +3047,7 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command)
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
xscale = target_to_xscale(target);
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -3067,15 +3067,15 @@ COMMAND_HANDLER(xscale_handle_cache_clean_address_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_cache_info_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return armv4_5_handle_cache_info_command(cmd_ctx, &xscale->armv4_5_mmu.armv4_5_cache);
|
||||
return armv4_5_handle_cache_info_command(CMD_CTX, &xscale->armv4_5_mmu.armv4_5_cache);
|
||||
}
|
||||
|
||||
static int xscale_virt2phys(struct target *target,
|
||||
@@ -3116,17 +3116,17 @@ static int xscale_mmu(struct target *target, int *enabled)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_mmu_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3144,25 +3144,25 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "mmu %s", (xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "mmu %s", (xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_idcache_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int icache = 0, dcache = 0;
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3194,27 +3194,27 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
|
||||
}
|
||||
|
||||
if (icache)
|
||||
command_print(cmd_ctx, "icache %s", (xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "icache %s", (xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled) ? "enabled" : "disabled");
|
||||
|
||||
if (dcache)
|
||||
command_print(cmd_ctx, "dcache %s", (xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) ? "enabled" : "disabled");
|
||||
command_print(CMD_CTX, "dcache %s", (xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled) ? "enabled" : "disabled");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_vector_catch_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (CMD_ARGC < 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: xscale vector_catch [mask]");
|
||||
command_print(CMD_CTX, "usage: xscale vector_catch [mask]");
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -3223,7 +3223,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command)
|
||||
xscale_write_dcsr(target, -1, -1);
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "vector catch mask: 0x%2.2x", xscale->vector_catch);
|
||||
command_print(CMD_CTX, "vector catch mask: 0x%2.2x", xscale->vector_catch);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -3231,12 +3231,12 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_vector_table_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int err = 0;
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -3244,13 +3244,13 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
|
||||
{
|
||||
int idx;
|
||||
|
||||
command_print(cmd_ctx, "active user-set static vectors:");
|
||||
command_print(CMD_CTX, "active user-set static vectors:");
|
||||
for (idx = 1; idx < 8; idx++)
|
||||
if (xscale->static_low_vectors_set & (1 << idx))
|
||||
command_print(cmd_ctx, "low %d: 0x%" PRIx32, idx, xscale->static_low_vectors[idx]);
|
||||
command_print(CMD_CTX, "low %d: 0x%" PRIx32, idx, xscale->static_low_vectors[idx]);
|
||||
for (idx = 1; idx < 8; idx++)
|
||||
if (xscale->static_high_vectors_set & (1 << idx))
|
||||
command_print(cmd_ctx, "high %d: 0x%" PRIx32, idx, xscale->static_high_vectors[idx]);
|
||||
command_print(CMD_CTX, "high %d: 0x%" PRIx32, idx, xscale->static_high_vectors[idx]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3281,7 +3281,7 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
|
||||
}
|
||||
|
||||
if (err)
|
||||
command_print(cmd_ctx, "usage: xscale vector_table <high|low> <index> <code>");
|
||||
command_print(CMD_CTX, "usage: xscale vector_table <high|low> <index> <code>");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
@@ -3289,19 +3289,19 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_trace_buffer_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common;
|
||||
uint32_t dcsr_value;
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3353,7 +3353,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
|
||||
xscale->trace.pc_ok = 0;
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "trace buffer %s (%s)",
|
||||
command_print(CMD_CTX, "trace buffer %s (%s)",
|
||||
(xscale->trace.buffer_enabled) ? "enabled" : "disabled",
|
||||
(xscale->trace.buffer_fill > 0) ? "fill" : "wrap");
|
||||
|
||||
@@ -3368,17 +3368,17 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_trace_image_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
if (CMD_ARGC < 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: xscale trace_image <file> [base address] [type]");
|
||||
command_print(CMD_CTX, "usage: xscale trace_image <file> [base address] [type]");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -3386,7 +3386,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
|
||||
{
|
||||
image_close(xscale->trace.image);
|
||||
free(xscale->trace.image);
|
||||
command_print(cmd_ctx, "previously loaded image found and closed");
|
||||
command_print(CMD_CTX, "previously loaded image found and closed");
|
||||
}
|
||||
|
||||
xscale->trace.image = malloc(sizeof(struct image));
|
||||
@@ -3416,25 +3416,25 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_dump_trace_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
struct xscale_trace_data *trace_data;
|
||||
struct fileio file;
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (CMD_ARGC < 1)
|
||||
{
|
||||
command_print(cmd_ctx, "usage: xscale dump_trace <file>");
|
||||
command_print(CMD_CTX, "usage: xscale dump_trace <file>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3442,7 +3442,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
|
||||
|
||||
if (!trace_data)
|
||||
{
|
||||
command_print(cmd_ctx, "no trace data collected");
|
||||
command_print(CMD_CTX, "no trace data collected");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
@@ -3473,32 +3473,32 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
xscale_analyze_trace(target, cmd_ctx);
|
||||
xscale_analyze_trace(target, CMD_CTX);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(xscale_handle_cp15)
|
||||
{
|
||||
struct target *target = get_current_target(cmd_ctx);
|
||||
struct target *target = get_current_target(CMD_CTX);
|
||||
struct xscale_common *xscale = target_to_xscale(target);
|
||||
int retval;
|
||||
|
||||
retval = xscale_verify_pointer(cmd_ctx, xscale);
|
||||
retval = xscale_verify_pointer(CMD_CTX, xscale);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
if (target->state != TARGET_HALTED)
|
||||
{
|
||||
command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
|
||||
return ERROR_OK;
|
||||
}
|
||||
uint32_t reg_no = 0;
|
||||
@@ -3534,7 +3534,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
|
||||
reg_no = XSCALE_CPACCESS;
|
||||
break;
|
||||
default:
|
||||
command_print(cmd_ctx, "invalid register number");
|
||||
command_print(CMD_CTX, "invalid register number");
|
||||
return ERROR_INVALID_ARGUMENTS;
|
||||
}
|
||||
reg = &xscale->reg_cache->reg_list[reg_no];
|
||||
@@ -3547,7 +3547,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
|
||||
/* read cp15 control register */
|
||||
xscale_get_reg(reg);
|
||||
value = buf_get_u32(reg->value, 0, 32);
|
||||
command_print(cmd_ctx, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value);
|
||||
command_print(CMD_CTX, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value);
|
||||
}
|
||||
else if (CMD_ARGC == 2)
|
||||
{
|
||||
@@ -3568,7 +3568,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
|
||||
}
|
||||
else
|
||||
{
|
||||
command_print(cmd_ctx, "usage: cp15 [register]<, [value]>");
|
||||
command_print(CMD_CTX, "usage: cp15 [register]<, [value]>");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
||||
Reference in New Issue
Block a user