ARM: rename ARMV4_5_STATE_* as ARM_STATE_*
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
@@ -659,7 +659,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
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return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
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}
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if (ctx->core_state == ARMV4_5_STATE_ARM)
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if (ctx->core_state == ARM_STATE_ARM)
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{
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uint8_t buf[4];
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if ((retval = image_read_section(ctx->image, section,
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@@ -672,7 +672,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
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opcode = target_buffer_get_u32(ctx->target, buf);
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arm_evaluate_opcode(opcode, ctx->current_pc, instruction);
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}
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else if (ctx->core_state == ARMV4_5_STATE_THUMB)
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else if (ctx->core_state == ARM_STATE_THUMB)
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{
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uint8_t buf[2];
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if ((retval = image_read_section(ctx->image, section,
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@@ -685,7 +685,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
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opcode = target_buffer_get_u16(ctx->target, buf);
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thumb_evaluate_opcode(opcode, ctx->current_pc, instruction);
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}
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else if (ctx->core_state == ARMV4_5_STATE_JAZELLE)
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else if (ctx->core_state == ARM_STATE_JAZELLE)
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{
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LOG_ERROR("BUG: tracing of jazelle code not supported");
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return ERROR_FAIL;
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@@ -829,7 +829,7 @@ static int etmv1_branch_address(struct etm_context *ctx)
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/* if a full address was output, we might have branched into Jazelle state */
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if ((shift == 32) && (packet & 0x80))
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{
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ctx->core_state = ARMV4_5_STATE_JAZELLE;
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ctx->core_state = ARM_STATE_JAZELLE;
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}
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else
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{
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@@ -837,12 +837,12 @@ static int etmv1_branch_address(struct etm_context *ctx)
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* encoded in bit 0 of the branch target address */
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if (ctx->last_branch & 0x1)
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{
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ctx->core_state = ARMV4_5_STATE_THUMB;
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ctx->core_state = ARM_STATE_THUMB;
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ctx->last_branch &= ~0x1;
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}
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else
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{
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ctx->core_state = ARMV4_5_STATE_ARM;
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ctx->core_state = ARM_STATE_ARM;
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ctx->last_branch &= ~0x3;
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}
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}
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@@ -1126,12 +1126,12 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context *
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}
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else
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{
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next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
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next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
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}
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}
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else if (pipestat == STAT_IN)
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{
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next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
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next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
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}
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if ((pipestat != STAT_TD) && (pipestat != STAT_WT))
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@@ -1498,7 +1498,7 @@ COMMAND_HANDLER(handle_etm_config_command)
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etm_ctx->trigger_percent = 50;
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etm_ctx->trace_data = NULL;
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etm_ctx->portmode = portmode;
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etm_ctx->core_state = ARMV4_5_STATE_ARM;
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etm_ctx->core_state = ARM_STATE_ARM;
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arm->etm = etm_ctx;
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