flash/nor/fespi: algorithm, large address, errors

* Move more smarts into the target algorithm code, and rewrite that in C
  so it's easier to understand/maintain.
* Support >24-bit addresses.
* Check for errors.

Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6679
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

contrib/loaders/flash/fespi/riscv_wrapper.S

@@ -0,0 +1,22 @@
+#if __riscv_xlen == 64
+# define LREG ld
+# define SREG sd
+# define REGBYTES 8
+#else
+# define LREG lw
+# define SREG sw
+# define REGBYTES 4
+#endif
+
+		.section .text.entry
+		.global _start
+_start:
+		lla		sp, stack_end
+		jal 	flash_fespi
+		ebreak
+
+		.section .data
+		.balign REGBYTES
+stack:
+		.fill	16, REGBYTES, 0x8675309
+stack_end: