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target.cfg: label ETBs correctly

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Various cores with an ETB have its TAP misnamed ... either as a
boundary scan TAP or as the iMX "Secure JTAG Controller" (which
is, among other things, a JRC that could be used to shorten
scan chains).

Use the correct name for these TAPs, which we can recognize since
their IDs were assigned by ARM and these chips all document the
presence of an ETB.  The 0x2b900f0f is ETB11; the 0x1b900f0f
is an older module, just called "ETB".

Also shrink the ETB's IR configuration; the default IR-Capture
value is fine, and the mask can specify that all four bits are
safe to check (per ARM documentation).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2009-11-13 13:44:50 -08:00
parent afe0298399
commit 38e8d60f79
5 changed files with 26 additions and 28 deletions
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14
tcl/target/imx31.cfg
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@@ -27,15 +27,15 @@ if { [info exists SDMATAPID ] } {
set _SDMATAPID 0x2190101d
}
#========================================
# The "system jtag controller"
# IMX31 reference manual, page 6-28 - figure 6-14
if { [info exists SJCTAPID ] } {
set _SJCTAPID $SJCTAPID
if { [info exists ETBTAPID ] } {
set _ETBTAPID $ETBTAPID
} else {
set _SJCTAPID 0x2b900f0f
set _ETBTAPID 0x2b900f0f
}
jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
#========================================
jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
# The "SDMA" - <S>mart <DMA> controller debug tap
# Based on some IO pins - this can be disabled & removed