target.cfg: label ETBs correctly
Various cores with an ETB have its TAP misnamed ... either as a boundary scan TAP or as the iMX "Secure JTAG Controller" (which is, among other things, a JRC that could be used to shorten scan chains). Use the correct name for these TAPs, which we can recognize since their IDs were assigned by ARM and these chips all document the presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f is an older module, just called "ETB". Also shrink the ETB's IR configuration; the default IR-Capture value is fine, and the mask can specify that all four bits are safe to check (per ARM documentation). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@@ -19,11 +19,12 @@ if { [info exists ENDIAN] } {
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set _ENDIAN little
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}
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if { [info exists BSTAPID ] } {
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set _BSTAPID $BSTAPID
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# trace buffer
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if { [info exists ETBTAPID ] } {
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set _ETBTAPID $ETBTAPID
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} else {
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# force an error till we get a good number
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set _BSTAPID 0x2b900f0f
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set _ETBTAPID 0x2b900f0f
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}
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if { [info exists CPUTAPID ] } {
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@@ -35,8 +36,7 @@ if { [info exists CPUTAPID ] } {
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#jtag scan chain
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# I think the "unknown" is the boundry scan tap
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jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_BSTAPID
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jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETBTAPID
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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