cleanup: rename armv4_5 to arm for readability
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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@@ -97,7 +97,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
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{
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struct target *target = nand->target;
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struct arm_algorithm algo;
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struct arm *armv4_5 = target->arch_info;
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struct arm *arm = target->arch_info;
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struct reg_param reg_params[3];
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uint32_t target_buf;
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uint32_t exit_var = 0;
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@@ -152,7 +152,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
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buf_set_u32(reg_params[2].value, 0, 32, size);
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/* armv4 must exit using a hardware breakpoint */
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if (armv4_5->is_armv4)
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if (arm->is_armv4)
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exit_var = nand->copy_area->address + sizeof(code) - 4;
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/* use alg to write data from work area to NAND chip */
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@@ -181,7 +181,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
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{
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struct target *target = nand->target;
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struct arm_algorithm algo;
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struct arm *armv4_5 = target->arch_info;
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struct arm *arm = target->arch_info;
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struct reg_param reg_params[3];
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uint32_t target_buf;
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uint32_t exit_var = 0;
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@@ -228,7 +228,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
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buf_set_u32(reg_params[2].value, 0, 32, size);
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/* armv4 must exit using a hardware breakpoint */
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if (armv4_5->is_armv4)
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if (arm->is_armv4)
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exit_var = nand->copy_area->address + sizeof(code) - 4;
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/* use alg to write data from NAND chip to work area */
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@@ -286,7 +286,7 @@ static int str9xpec_build_block_list(struct flash_bank *bank)
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FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command)
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{
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struct str9xpec_flash_controller *str9xpec_info;
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struct arm *armv4_5 = NULL;
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struct arm *arm = NULL;
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struct arm7_9_common *arm7_9 = NULL;
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struct arm_jtag *jtag_info = NULL;
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@@ -301,8 +301,8 @@ FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command)
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/* REVISIT verify that the jtag position of flash controller is
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* right after *THIS* core, which must be a STR9xx core ...
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*/
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armv4_5 = bank->target->arch_info;
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arm7_9 = armv4_5->arch_info;
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arm = bank->target->arch_info;
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arm7_9 = arm->arch_info;
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jtag_info = &arm7_9->jtag_info;
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/* The core is the next tap after the flash controller in the chain */
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