cleanup: rename armv4_5 to arm for readability
Nothing more than a name change, just to make reading the code a bit simpler. Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/390 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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@@ -246,11 +246,11 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
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static int arm920t_read_cp15_interpreted(struct target *target,
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uint32_t cp15_opcode, uint32_t address, uint32_t *value)
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{
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struct arm *armv4_5 = target_to_arm(target);
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struct arm *arm = target_to_arm(target);
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uint32_t* regs_p[1];
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uint32_t regs[2];
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uint32_t cp15c15 = 0x0;
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struct reg *r = armv4_5->core_cache->reg_list;
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struct reg *r = arm->core_cache->reg_list;
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/* load address into R1 */
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regs[1] = address;
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@@ -280,7 +280,7 @@ static int arm920t_read_cp15_interpreted(struct target *target,
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cp15_opcode, address, *value);
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#endif
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if (!is_arm_mode(armv4_5->core_mode))
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if (!is_arm_mode(arm->core_mode))
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{
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LOG_ERROR("not a valid arm core mode - communication failure?");
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return ERROR_FAIL;
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@@ -297,9 +297,9 @@ int arm920t_write_cp15_interpreted(struct target *target,
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uint32_t cp15_opcode, uint32_t value, uint32_t address)
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{
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uint32_t cp15c15 = 0x0;
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struct arm *armv4_5 = target_to_arm(target);
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struct arm *arm = target_to_arm(target);
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uint32_t regs[2];
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struct reg *r = armv4_5->core_cache->reg_list;
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struct reg *r = arm->core_cache->reg_list;
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/* load value, address into R0, R1 */
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regs[0] = value;
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@@ -325,7 +325,7 @@ int arm920t_write_cp15_interpreted(struct target *target,
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cp15_opcode, value, address);
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#endif
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if (!is_arm_mode(armv4_5->core_mode))
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if (!is_arm_mode(arm->core_mode))
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{
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LOG_ERROR("not a valid arm core mode - communication failure?");
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return ERROR_FAIL;
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@@ -763,7 +763,7 @@ int arm920t_soft_reset_halt(struct target *target)
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int retval = ERROR_OK;
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struct arm920t_common *arm920t = target_to_arm920(target);
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm *armv4_5 = &arm7_9->armv4_5_common;
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struct arm *arm = &arm7_9->arm;
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struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
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if ((retval = target_halt(target)) != ERROR_OK)
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@@ -807,16 +807,16 @@ int arm920t_soft_reset_halt(struct target *target)
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/* SVC, ARM state, IRQ and FIQ disabled */
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uint32_t cpsr;
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cpsr = buf_get_u32(armv4_5->cpsr->value, 0, 32);
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cpsr = buf_get_u32(arm->cpsr->value, 0, 32);
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cpsr &= ~0xff;
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cpsr |= 0xd3;
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arm_set_cpsr(armv4_5, cpsr);
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armv4_5->cpsr->dirty = 1;
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arm_set_cpsr(arm, cpsr);
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arm->cpsr->dirty = 1;
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/* start fetching from 0x0 */
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buf_set_u32(armv4_5->pc->value, 0, 32, 0x0);
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armv4_5->pc->dirty = 1;
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armv4_5->pc->valid = 1;
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buf_set_u32(arm->pc->value, 0, 32, 0x0);
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arm->pc->dirty = 1;
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arm->pc->valid = 1;
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arm920t_disable_mmu_caches(target, 1, 1, 1);
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arm920t->armv4_5_mmu.mmu_enabled = 0;
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@@ -841,8 +841,8 @@ static int arm920t_init_arch_info(struct target *target,
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{
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struct arm7_9_common *arm7_9 = &arm920t->arm7_9_common;
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arm7_9->armv4_5_common.mrc = arm920t_mrc;
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arm7_9->armv4_5_common.mcr = arm920t_mcr;
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arm7_9->arm.mrc = arm920t_mrc;
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arm7_9->arm.mcr = arm920t_mcr;
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/* initialize arm7/arm9 specific info (including armv4_5) */
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arm9tdmi_init_arch_info(target, arm7_9, tap);
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@@ -887,7 +887,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
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struct target *target = get_current_target(CMD_CTX);
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struct arm920t_common *arm920t = target_to_arm920(target);
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm *armv4_5 = &arm7_9->armv4_5_common;
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struct arm *arm = &arm7_9->arm;
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uint32_t cp15c15;
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uint32_t cp15_ctrl, cp15_ctrl_saved;
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uint32_t regs[16];
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@@ -1148,14 +1148,14 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
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fclose(output);
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if (!is_arm_mode(armv4_5->core_mode))
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if (!is_arm_mode(arm->core_mode))
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{
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LOG_ERROR("not a valid arm core mode - communication failure?");
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return ERROR_FAIL;
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}
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/* force writeback of the valid data */
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r = armv4_5->core_cache->reg_list;
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r = arm->core_cache->reg_list;
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r[0].dirty = r[0].valid;
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r[1].dirty = r[1].valid;
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r[2].dirty = r[2].valid;
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@@ -1165,10 +1165,10 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
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r[6].dirty = r[6].valid;
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r[7].dirty = r[7].valid;
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r = arm_reg_current(armv4_5, 8);
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r = arm_reg_current(arm, 8);
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r->dirty = r->valid;
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r = arm_reg_current(armv4_5, 9);
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r = arm_reg_current(arm, 9);
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r->dirty = r->valid;
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return ERROR_OK;
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@@ -1180,7 +1180,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
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struct target *target = get_current_target(CMD_CTX);
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struct arm920t_common *arm920t = target_to_arm920(target);
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm *armv4_5 = &arm7_9->armv4_5_common;
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struct arm *arm = &arm7_9->arm;
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uint32_t cp15c15;
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uint32_t cp15_ctrl, cp15_ctrl_saved;
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uint32_t regs[16];
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@@ -1477,14 +1477,14 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
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fclose(output);
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if (!is_arm_mode(armv4_5->core_mode))
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if (!is_arm_mode(arm->core_mode))
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{
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LOG_ERROR("not a valid arm core mode - communication failure?");
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return ERROR_FAIL;
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}
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/* force writeback of the valid data */
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r = armv4_5->core_cache->reg_list;
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r = arm->core_cache->reg_list;
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r[0].dirty = r[0].valid;
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r[1].dirty = r[1].valid;
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r[2].dirty = r[2].valid;
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@@ -1494,10 +1494,10 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
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r[6].dirty = r[6].valid;
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r[7].dirty = r[7].valid;
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r = arm_reg_current(armv4_5, 8);
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r = arm_reg_current(arm, 8);
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r->dirty = r->valid;
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r = arm_reg_current(armv4_5, 9);
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r = arm_reg_current(arm, 9);
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r->dirty = r->valid;
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return ERROR_OK;
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