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AT91SAM9 NAND flash driver.

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This creates the TCL interface for configuring an AT91SAM9 NAND flash
controller and implements the necessary functions to correctly work with
a NAND flash device connected to the chip.  This includes updates to the
driver list and the Makefile.am to support building the driver and also
houses the documentation update in openocd.texi.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
Dean Glazeski
2009-12-09 12:40:54 -06:00
committed by David Brownell
parent 28f8e9dfb7
commit 3ac2a44041
4 changed files with 789 additions and 1 deletions
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35
doc/openocd.texi
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@@ -4812,6 +4812,41 @@ As noted above, the @command{nand device} command allows
driver-specific options and behaviors.
Some controllers also activate controller-specific commands.
@deffn {NAND Driver} at91sam9
This driver handles the NAND controllers found on AT91SAM9 family chips from
Atmel. It takes two extra parameters: address of the NAND chip;
address of the ECC controller.
@example
nand device $NANDFLASH at91sam9 $CHIPNAME 0x40000000 0xfffffe800
@end example
AT91SAM9 chips support single-bit ECC hardware. The @code{write_page} and
@code{read_page} methods are used to utilize the ECC hardware unless they are
disabled by using the @command{nand raw_access} command. There are four
additional commands that are needed to fully configure the AT91SAM9 NAND
controller. Two are optional; most boards use the same wiring for ALE/CLE:
@deffn Command {at91sam9 cle} num addr_line
Configure the address line used for latching commands. The @var{num}
parameter is the value shown by @command{nand list}.
@end deffn
@deffn Command {at91sam9 ale} num addr_line
Configure the address line used for latching addresses. The @var{num}
parameter is the value shown by @command{nand list}.
@end deffn
For the next two commands, it is assumed that the pins have already been
properly configured for input or output.
@deffn Command {at91sam9 rdy_busy} num pio_base_addr pin
Configure the RDY/nBUSY input from the NAND device. The @var{num}
parameter is the value shown by @command{nand list}. @var{pio_base_addr}
is the base address of the PIO controller and @var{pin} is the pin number.
@end deffn
@deffn Command {at91sam9 ce} num pio_base_addr pin
Configure the chip enable input to the NAND device. The @var{num}
parameter is the value shown by @command{nand list}. @var{pio_base_addr}
is the base address of the PIO controller and @var{pin} is the pin number.
@end deffn
@end deffn
@deffn {NAND Driver} davinci
This driver handles the NAND controllers found on DaVinci family
chips from Texas Instruments.