target/cortex_m: supress historical reset detection
The S_RESET_ST sticky bit is reset after DHCSR read. It is set at power-on reset and keeps active until the debuger reads DHCSR. Ignore S_RESET_ST at the very first read after OpenOCD start and suppress possibly misleading message "external reset detected" if we cannot guarantee the reset happened recently. While on it add a TODO comment. Change-Id: I15217c2ca6f69ac97aff8be86bce67cba94a42cd Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/7109 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Antonio Borneo
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@@ -206,6 +206,8 @@ struct cortex_m_common {
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/* Context information */
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uint32_t dcb_dhcsr;
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uint32_t dcb_dhcsr_cumulated_sticky;
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/* DCB DHCSR has been at least once read, so the sticky bits have been reset */
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bool dcb_dhcsr_sticky_is_recent;
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uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
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uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
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