mips32: add per-cpu quirks feature

Introduce the ability to detect CPUs based on CP0 PRId register and
apply cpu specific quirks, which alter the default ejtag behavior.

First of those is EJTAG_QUIRK_PAD_DRET, which makes sure extra NOPs are
placed after the DRET instruction on exit from debug mode. This fixes
resume behavior on Ingenic JZ4780 SoC.

The proper detection of some (currently unsupported) CPUs becomes quite
complicated, so please consult the following Linux kernel code when
adding new CPUs:
* arch/mips/include/asm/cpu.h
* arch/mips/kernel/cpu-probe.c

Change-Id: I0f413d5096cd43ef346b02cea85024985b7face6
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7859
Tested-by: jenkins

src/target/mips_m4k.c

@@ -100,6 +100,8 @@ static int mips_m4k_debug_entry(struct target *target)
 	/* attempt to find halt reason */
 	mips_m4k_examine_debug_reason(target);
 
+	mips32_cpu_probe(target);
+
 	mips32_read_config_regs(target);
 
 	/* default to mips32 isa, it will be changed below if required */