Zach Welch <zw@superlucidity.net> fix -Werror warnings

git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/arm720t.h

@@ -32,7 +32,7 @@
 
 typedef struct arm720t_common_s
 {
-	int common_magic;
+	u32 common_magic;
 	armv4_5_mmu_common_t armv4_5_mmu;
 	arm7tdmi_common_t arm7tdmi_common;
 	u32 cp15_control_reg;

src/target/arm7_9_common.c

@@ -655,7 +655,8 @@ int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer)
 	arm7_9_common_t *arm7_9 = armv4_5->arch_info;
 	arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 	u32 *data;
-	int i, retval = ERROR_OK;
+	int retval = ERROR_OK;
+	u32 i;
 
 	data = malloc(size * (sizeof(u32)));
 
@@ -1956,7 +1957,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count
 	arm7_9_common_t *arm7_9 = armv4_5->arch_info;
 
 	u32 reg[16];
-	int num_accesses = 0;
+	u32 num_accesses = 0;
 	int thisrun_accesses;
 	int i;
 	u32 cpsr;
@@ -2133,7 +2134,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun
 	reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
 
 	u32 reg[16];
-	int num_accesses = 0;
+	u32 num_accesses = 0;
 	int thisrun_accesses;
 	int i;
 	u32 cpsr;
@@ -2466,7 +2467,7 @@ int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
 		0x04C11DB7				/* CRC32XOR:	.word 0x04C11DB7 */
 	};
 
-	int i;
+	u32 i;
 
 	if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
 	{
@@ -2518,7 +2519,7 @@ int arm7_9_blank_check_memory(struct target_s *target, u32 address, u32 count, u
 	reg_param_t reg_params[3];
 	armv4_5_algorithm_t armv4_5_info;
 	int retval;
-	int i;
+	u32 i;
 
 	u32 erase_check_code[] =
 	{

src/target/arm7_9_common.h

@@ -40,7 +40,7 @@
 
 typedef struct arm7_9_common_s
 {
-	int common_magic;
+	u32 common_magic;
 	
 	arm_jtag_t jtag_info;
 	reg_cache_t *eice_cache;

src/target/arm920t.h

@@ -32,7 +32,7 @@
 
 typedef struct arm920t_common_s
 {
-	int common_magic;
+	u32 common_magic;
 	armv4_5_mmu_common_t armv4_5_mmu;
 	arm9tdmi_common_t arm9tdmi_common;
 	u32 cp15_control_reg;

src/target/arm926ejs.h

@@ -32,7 +32,7 @@
 
 typedef struct arm926ejs_common_s
 {
-	int common_magic;
+	u32 common_magic;
 	armv4_5_mmu_common_t armv4_5_mmu;
 	arm9tdmi_common_t arm9tdmi_common;
 	int (*read_cp15)(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 *value);

src/target/arm_jtag.h

@@ -30,9 +30,9 @@ typedef struct arm_jtag_s
 {
 	jtag_tap_t *tap;
 	
-	int scann_size;
+	u32 scann_size;
 	u32 scann_instr;
-	int cur_scan_chain;
+	u32 cur_scan_chain;
 	
 	u32 intest_instr;
 } arm_jtag_t;

src/target/armv4_5.c

@@ -231,7 +231,7 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
 			}
 		}
 
-		if (armv4_5_target->core_mode != (value & 0x1f))
+		if (armv4_5_target->core_mode != (enum armv4_5_mode)(value & 0x1f))
 		{
 			LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
 			armv4_5_target->core_mode = value & 0x1f;

src/target/armv7m.c

@@ -591,7 +591,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
 		0x1DB7, 0x04C1			/* CRC32XOR:	.word 0x04C11DB7 */
 	};
 
-	int i;
+	u32 i;
 
 	if (target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm) != ERROR_OK)
 	{
@@ -640,7 +640,7 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
 	reg_param_t reg_params[3];
 	armv7m_algorithm_t armv7m_info;
 	int retval;
-	int i;
+	u32 i;
 
 	u16 erase_check_code[] =
 	{

src/target/cortex_m3.c

@@ -1475,7 +1475,7 @@ int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer)
 	swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
 	u8 data;
 	u8 ctrl;
-	int i;
+	u32 i;
 	
 	for (i = 0; i < (size * 4); i++)
 	{

src/target/embeddedice.c

@@ -484,7 +484,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
 	u8 field1_out[1];
 	u8 field2_out[1];
 	int retval;
-	int hsact;
+	u32 hsact;
 	struct timeval lap;
 	struct timeval now;
 
@@ -544,7 +544,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
 
 		gettimeofday(&now, NULL);
 	}
-	while ((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000 <= timeout);
+	while ((u32)((now.tv_sec-lap.tv_sec)*1000 + (now.tv_usec-lap.tv_usec)/1000) <= timeout);
 
 	return ERROR_TARGET_TIMEOUT;
 }

src/target/etb.c

@@ -453,7 +453,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
 		arm7_9->etm_ctx->capture_driver_priv = etb;
 
 		etb->tap  = tap;
-		etb->cur_scan_chain = -1;
+		etb->cur_scan_chain = ~0UL;
 		etb->reg_cache = NULL;
 		etb->ram_width = 0;
 		etb->ram_depth = 0;

src/target/etb.h

@@ -46,17 +46,17 @@ typedef struct etb_s
 {
 	etm_context_t *etm_ctx;
 	jtag_tap_t *tap;
-	int cur_scan_chain;
+	u32 cur_scan_chain;
 	reg_cache_t *reg_cache;
 	
 	/* ETB parameters */
-	int ram_depth;
-	int ram_width;
+	u32 ram_depth;
+	u32 ram_width;
 } etb_t;
 
 typedef struct etb_reg_s
 {
-	int addr;
+	u32 addr;
 	etb_t *etb;
 } etb_reg_t;
 

src/target/etm.c

@@ -647,7 +647,7 @@ int etmv1_branch_address(etm_context_t *ctx)
 	u8 packet;
 	int shift = 0;
 	int apo;
-	int i;
+	u32 i;
 
 	/* quit analysis if less than two cycles are left in the trace
 	 * because we can't extract the APO */
@@ -998,7 +998,7 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
 			if (((instruction.type == ARM_B) ||
 				(instruction.type == ARM_BL) ||
 				(instruction.type == ARM_BLX)) &&
-				(instruction.info.b_bl_bx_blx.target_address != -1))
+				(instruction.info.b_bl_bx_blx.target_address != ~0UL))
 			{
 				next_pc = instruction.info.b_bl_bx_blx.target_address;
 			}
@@ -1543,7 +1543,7 @@ int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char *
 	armv4_5_common_t *armv4_5;
 	arm7_9_common_t *arm7_9;
 	etm_context_t *etm_ctx;
-	int i;
+	u32 i;
 
 	if (argc != 1)
 	{
@@ -1611,7 +1611,7 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char *
 	armv4_5_common_t *armv4_5;
 	arm7_9_common_t *arm7_9;
 	etm_context_t *etm_ctx;
-	int i;
+	u32 i;
 
 	if (argc != 1)
 	{

src/target/feroceon.c

@@ -517,7 +517,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
 	arm7_9_common_t *arm7_9 = armv4_5->arch_info;
 	enum armv4_5_state core_state = armv4_5->core_state;
 	u32 x, flip, shift, save[7];
-	int i;
+	u32 i;
 
 	/*
 	 * We can't use the dcc flow control bits, so let's transfer data
@@ -547,7 +547,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
 		0xeafffff3,	/*	b	3b			*/
 	};
 
-	int dcc_size = sizeof(dcc_code);
+	u32 dcc_size = sizeof(dcc_code);
 
 	if (!arm7_9->dcc_downloads)
 		return target->type->write_memory(target, address, 4, count, buffer);

src/target/mips32.h

@@ -47,7 +47,7 @@ typedef struct mips32_comparator_s
 
 typedef struct mips32_common_s
 {
-	int common_magic;
+	u32 common_magic;
 	void *arch_info;
 	reg_cache_t *core_cache;
 	mips_ejtag_t ejtag_info;

src/target/mips_ejtag.c

@@ -40,7 +40,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t h
 	if (tap==NULL)
 		return ERROR_FAIL;
 
-	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
+	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
 	{
 		scan_field_t field;
 		u8 t[4];

src/target/oocd_trace.c

@@ -78,7 +78,8 @@ int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
 
 int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size)
 {
-	size_t bytes_written, bytes_read, bytes_to_read;
+	size_t bytes_written, bytes_to_read;
+	ssize_t bytes_read;
 	u8 cmd;
 
 	oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, address);
@@ -188,7 +189,7 @@ int oocd_trace_read_trace(etm_context_t *etm_ctx)
 	u32 first_frame = 0x0;
 	u32 num_frames = 1048576;
 	u8 *trace_data;
-	int i;
+	u32 i;
 
 	oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
 	oocd_trace_read_reg(oocd_trace, OOCD_TRACE_ADDRESS, &address);

src/target/register.h

@@ -40,7 +40,7 @@ typedef struct reg_s
 	u8 *value;
 	int dirty;
 	int valid;
-	int size;
+	u32 size;
 	bitfield_desc_t *bitfield_desc;
 	int num_bitfields;
 	void *arch_info;

src/target/target.c

@@ -985,7 +985,7 @@ int target_write_buffer(struct target_s *target, u32 address, u32 size, u8 *buff
 	/* handle unaligned head bytes */
 	if (address % 4)
 	{
-		int unaligned = 4 - (address % 4);
+		u32 unaligned = 4 - (address % 4);
 
 		if (unaligned > size)
 			unaligned = size;
@@ -1060,7 +1060,7 @@ int target_read_buffer(struct target_s *target, u32 address, u32 size, u8 *buffe
 	/* handle unaligned head bytes */
 	if (address % 4)
 	{
-		int unaligned = 4 - (address % 4);
+		u32 unaligned = 4 - (address % 4);
 
 		if (unaligned > size)
 			unaligned = size;
@@ -1100,7 +1100,7 @@ int target_checksum_memory(struct target_s *target, u32 address, u32 size, u32*
 {
 	u8 *buffer;
 	int retval;
-	int i;
+	u32 i;
 	u32 checksum = 0;
 	if (!target->type->examined)
 	{
@@ -2273,7 +2273,7 @@ int handle_verify_image_command_internal(struct command_context_s *cmd_ctx, char
 				retval = target->type->read_memory(target, image.sections[i].base_address, size, count, data);
 				if (retval == ERROR_OK)
 				{
-					int t;
+					u32 t;
 					for (t = 0; t < buf_cnt; t++)
 					{
 						if (data[t] != buffer[t])
@@ -2508,9 +2508,9 @@ static void writeString(FILE *f, char *s)
 }
 
 /* Dump a gmon.out histogram file. */
-static void writeGmon(u32 *samples, int sampleNum, char *filename)
+static void writeGmon(u32 *samples, u32 sampleNum, char *filename)
 {
-	int i;
+	u32 i;
 	FILE *f=fopen(filename, "w");
 	if (f==NULL)
 		return;
@@ -2539,8 +2539,8 @@ static void writeGmon(u32 *samples, int sampleNum, char *filename)
 
 	int addressSpace=(max-min+1);
 
-	static int const maxBuckets=256*1024; /* maximum buckets. */
-	int length=addressSpace;
+	static const u32 maxBuckets = 256 * 1024; /* maximum buckets. */
+	u32 length = addressSpace;
 	if (length > maxBuckets)
 	{
 		length=maxBuckets;
@@ -2747,7 +2747,8 @@ static int target_mem2array(Jim_Interp *interp, target_t *target, int argc, Jim_
 	u32 v;
 	const char *varname;
 	u8 buffer[4096];
-	int  i, n, e, retval;
+	int  n, e, retval;
+	u32 i;
 
 	/* argv[1] = name of array to receive the data
 	 * argv[2] = desired width
@@ -2928,7 +2929,8 @@ static int target_array2mem(Jim_Interp *interp, target_t *target, int argc, Jim_
 	u32 v;
 	const char *varname;
 	u8 buffer[4096];
-	int  i, n, e, retval;
+	int  n, e, retval;
+	u32 i;
 
 	/* argv[1] = name of array to get the data
 	 * argv[2] = desired width
@@ -3200,7 +3202,7 @@ static int target_configure( Jim_GetOptInfo *goi, target_t *target )
 				teap = target->event_action;
 				/* replace existing? */
 				while( teap ){
-					if( teap->event == n->value ){
+					if( teap->event == (enum target_event)n->value ){
 						break;
 					}
 					teap = teap->next;

src/target/target_request.c

@@ -73,7 +73,7 @@ int target_hexmsg(target_t *target, int size, u32 length)
 	char line[128];
 	int line_len;
 	debug_msg_receiver_t *c = target->dbgmsg;
-	int i;
+	u32 i;
 	
 	LOG_DEBUG("size: %i, length: %i", size, length);
 

src/target/trace.c

@@ -31,7 +31,7 @@
 #include <string.h>
 #include <inttypes.h>
 
-int trace_point(target_t *target, int number)
+int trace_point(target_t *target, u32 number)
 {
 	trace_t *trace = target->trace_info;
 
@@ -60,7 +60,7 @@ int handle_trace_point_command(struct command_context_s *cmd_ctx, char *cmd, cha
 	
 	if (argc == 0)
 	{
-		int i;
+		u32 i;
 		
 		for (i = 0; i < trace->num_trace_points; i++)
 		{
@@ -125,9 +125,9 @@ int handle_trace_history_command(struct command_context_s *cmd_ctx, char *cmd, c
 	}
 	else
 	{
-		int i;
-		int first = 0;
-		int last = trace->trace_history_pos;
+		u32 i;
+		u32 first = 0;
+		u32 last = trace->trace_history_pos;
 
 		if ( !trace->trace_history_size ) {
 			command_print(cmd_ctx, "trace history buffer is not allocated");

src/target/trace.h

@@ -32,12 +32,12 @@ typedef struct trace_point_s
 
 typedef struct trace_s
 {
-	int num_trace_points;
-	int trace_points_size;
+	u32 num_trace_points;
+	u32 trace_points_size;
 	trace_point_t *trace_points;
-	int trace_history_size;
+	u32 trace_history_size;
 	u32 *trace_history;
-	int trace_history_pos;
+	u32 trace_history_pos;
 	int trace_history_overflowed;
 } trace_t;
 
@@ -50,7 +50,7 @@ typedef enum trace_status
 	TRACE_OVERFLOWED = 0x8,
 } trace_status_t;
 
-extern int trace_point(struct target_s *target, int number);
+extern int trace_point(struct target_s *target, u32 number);
 extern int trace_register_commands(struct command_context_s *cmd_ctx);
 
 #define ERROR_TRACE_IMAGE_UNAVAILABLE		-(1500)

src/target/xscale.c

@@ -1631,7 +1631,7 @@ int xscale_deassert_reset(target_t *target)
 	u32 binary_size;
 
 	u32 buf_cnt;
-	int i;
+	u32 i;
 	int retval;
 
 	breakpoint_t *breakpoint = target->breakpoints;
@@ -1928,7 +1928,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	xscale_common_t *xscale = armv4_5->arch_info;
 	u32 *buf32;
-	int i;
+	u32 i;
 	int retval;
 
 	LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
@@ -2933,7 +2933,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
 						(((instruction.type == ARM_B) ||
 							(instruction.type == ARM_BL) ||
 							(instruction.type == ARM_BLX)) &&
-							(instruction.info.b_bl_bx_blx.target_address != -1)))
+							(instruction.info.b_bl_bx_blx.target_address != ~0UL)))
 					{
 						xscale->trace.current_pc = instruction.info.b_bl_bx_blx.target_address;
 					}