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Merge pull request #191 from riscv/scanbuild

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Fix some niggles found by clang's static analysis.
This commit is contained in:
Tim Newsome
2018-01-24 07:59:47 -08:00
committed by GitHub
parent 5e22040b67 553a63808c
commit 42e601afc1
4 changed files with 31 additions and 14 deletions
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src/flash/nor/fespi.c
+2 -1
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@@ -796,7 +796,6 @@ static int steps_execute(struct algorithm_steps *as,
struct target *target = bank->target;
struct fespi_flash_bank *fespi_info = bank->driver_priv;
uint32_t ctrl_base = fespi_info->ctrl_base;
uint8_t *data_buf = malloc(data_wa->size);
int xlen = riscv_xlen(target);
struct reg_param reg_params[2];
@@ -806,9 +805,11 @@ static int steps_execute(struct algorithm_steps *as,
buf_set_u64(reg_params[1].value, 0, xlen, data_wa->address);
while (!as_empty(as)) {
keep_alive();
uint8_t *data_buf = malloc(data_wa->size);
unsigned bytes = as_compile(as, data_buf, data_wa->size);
int retval = target_write_buffer(target, data_wa->address, bytes,
data_buf);
free(data_buf);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write data to 0x%" TARGET_PRIxADDR ": %d",
data_wa->address, retval);