TAP_SD/SI are now forbidden end states.
jtag_add_reset() now returns void streamlining the API git-svn-id: svn://svn.berlios.de/openocd/trunk@525 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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+13
-38
@@ -701,13 +701,18 @@ int cortex_m3_step(struct target_s *target, int current, u32 address, int handle
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int cortex_m3_assert_reset(target_t *target)
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{
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int retval;
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armv7m_common_t *armv7m = target->arch_info;
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cortex_m3_common_t *cortex_m3 = armv7m->arch_info;
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swjdp_common_t *swjdp = &cortex_m3->swjdp_info;
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LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
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if (!(jtag_reset_config & RESET_HAS_SRST))
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{
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LOG_ERROR("Can't assert SRST");
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return ERROR_FAIL;
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}
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ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
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if (target->reset_mode == RESET_RUN)
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@@ -727,46 +732,16 @@ int cortex_m3_assert_reset(target_t *target)
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{
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/* assert SRST and TRST */
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/* system would get ouf sync if we didn't reset test-logic, too */
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if ((retval = jtag_add_reset(1, 1)) != ERROR_OK)
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{
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if (retval == ERROR_JTAG_RESET_CANT_SRST)
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{
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return retval;
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}
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else
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{
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LOG_ERROR("unknown error");
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exit(-1);
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}
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}
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jtag_add_reset(1, 1);
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jtag_add_sleep(5000);
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if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
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{
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if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
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{
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retval = jtag_add_reset(1, 1);
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}
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}
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}
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else
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if (jtag_reset_config & RESET_SRST_PULLS_TRST)
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{
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if ((retval = jtag_add_reset(0, 1)) != ERROR_OK)
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{
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if (retval == ERROR_JTAG_RESET_WOULD_ASSERT_TRST)
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{
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retval = jtag_add_reset(1, 1);
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}
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if (retval == ERROR_JTAG_RESET_CANT_SRST)
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{
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return retval;
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}
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else if (retval != ERROR_OK)
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{
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LOG_ERROR("unknown error");
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exit(-1);
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}
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}
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jtag_add_reset(1, 1);
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} else
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{
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jtag_add_reset(0, 1);
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}
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target->state = TARGET_RESET;
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