Generic Xtensa target config files

- Add new Xtensa TCL board files
- Add new Xtensa KC705 on-board FTDI interface
- Add new generic Xtensa and VDebug Xtensa target files

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I4acb15c83d1b7b8e6063833ce829530cb22a795e
Reviewed-on: https://review.openocd.org/c/openocd/+/7083
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Ian Thompson
2022-07-10 17:35:50 -07:00
committed by Antonio Borneo
parent ce5ca9f7ba
commit 44e21b41df
6 changed files with 125 additions and 0 deletions

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# SPDX-License-Identifier: GPL-2.0-or-later
# Cadence virtual debug interface
# for Palladium emulation systems
#
source [find interface/vdebug.cfg]
# vdebug select JTAG transport
transport select jtag
# JTAG reset config, frequency and reset delay
reset_config trst_and_srst
adapter speed 50000
adapter srst delay 5
source [find target/vd_xtensa_jtag.cfg]