debug: debug entry error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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@@ -1056,12 +1056,16 @@ static int cortex_a8_debug_entry(struct target *target)
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/* Are we in an exception handler */
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// armv4_5->exception_number = 0;
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if (armv7a->post_debug_entry)
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armv7a->post_debug_entry(target);
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{
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retval = armv7a->post_debug_entry(target);
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if (retval != ERROR_OK)
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return retval;
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}
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return retval;
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}
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static void cortex_a8_post_debug_entry(struct target *target)
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static int cortex_a8_post_debug_entry(struct target *target)
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{
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struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
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struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
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@@ -1072,6 +1076,8 @@ static void cortex_a8_post_debug_entry(struct target *target)
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0, 0, /* op1, op2 */
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1, 0, /* CRn, CRm */
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&cortex_a8->cp15_control_reg);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("cp15_control_reg: %8.8" PRIx32, cortex_a8->cp15_control_reg);
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if (armv7a->armv4_5_mmu.armv4_5_cache.ctype == -1)
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@@ -1083,6 +1089,8 @@ static void cortex_a8_post_debug_entry(struct target *target)
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0, 1, /* op1, op2 */
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0, 0, /* CRn, CRm */
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&cache_type_reg);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("cp15 cache type: %8.8x", (unsigned) cache_type_reg);
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/* FIXME the armv4_4 cache info DOES NOT APPLY to Cortex-A8 */
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@@ -1097,7 +1105,7 @@ static void cortex_a8_post_debug_entry(struct target *target)
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armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled =
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(cortex_a8->cp15_control_reg & 0x1000U) ? 1 : 0;
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return ERROR_OK;
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}
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static int cortex_a8_step(struct target *target, int current, uint32_t address,
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