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rename "swjdp_common" as "adiv5_dap"

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This partially corrects an inappropriate name choice (and its
associated FIXME).

There are still too many variables named "swjdp", bug little
current code actually relies on them referencing an SWJ-DP instead
of some other flavor of DAP.  Only the two new dap_to{swd,jtag}()
calls could behave differently on an SWJ-DP instead of a SW-DP or
a JTAG-DP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2010-03-04 21:51:58 -08:00
parent 5e78ddcea0
commit 45a528ff3c
8 changed files with 114 additions and 116 deletions
Download Patch File Download Diff File Expand all files Collapse all files

36
src/target/cortex_a8.c
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@@ -67,7 +67,7 @@ static int cortex_a8_dap_write_coreregister_u32(struct target *target,
static int cortex_a8_init_debug_access(struct target *target)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
int retval;
uint32_t dummy;
@@ -103,7 +103,7 @@ static int cortex_a8_exec_opcode(struct target *target,
uint32_t dscr;
int retval;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
dscr = dscr_p ? *dscr_p : 0;
@@ -150,7 +150,7 @@ static int cortex_a8_read_regs_through_mem(struct target *target, uint32_t addre
{
int retval = ERROR_OK;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
cortex_a8_dap_write_coreregister_u32(target, address, 0);
@@ -169,7 +169,7 @@ static int cortex_a8_dap_read_coreregister_u32(struct target *target,
uint8_t reg = regnum&0xFF;
uint32_t dscr = 0;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
if (reg > 17)
return retval;
@@ -221,7 +221,7 @@ static int cortex_a8_dap_write_coreregister_u32(struct target *target,
uint8_t Rd = regnum&0xFF;
uint32_t dscr;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value);
@@ -284,7 +284,7 @@ static int cortex_a8_dap_write_memap_register_u32(struct target *target, uint32_
{
int retval;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
retval = mem_ap_write_atomic_u32(swjdp, address, value);
@@ -317,7 +317,7 @@ static int cortex_a8_write_dcc(struct cortex_a8_common *a8, uint32_t data)
static int cortex_a8_read_dcc(struct cortex_a8_common *a8, uint32_t *data,
uint32_t *dscr_p)
{
struct swjdp_common *swjdp = &a8->armv7a_common.swjdp_info;
struct adiv5_dap *swjdp = &a8->armv7a_common.swjdp_info;
uint32_t dscr = DSCR_INSTR_COMP;
int retval;
@@ -344,7 +344,7 @@ static int cortex_a8_read_dcc(struct cortex_a8_common *a8, uint32_t *data,
static int cortex_a8_dpm_prepare(struct arm_dpm *dpm)
{
struct cortex_a8_common *a8 = dpm_to_a8(dpm);
struct swjdp_common *swjdp = &a8->armv7a_common.swjdp_info;
struct adiv5_dap *swjdp = &a8->armv7a_common.swjdp_info;
uint32_t dscr;
int retval;
@@ -562,7 +562,7 @@ static int cortex_a8_poll(struct target *target)
uint32_t dscr;
struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
enum target_state prev_target_state = target->state;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
@@ -626,7 +626,7 @@ static int cortex_a8_halt(struct target *target)
int retval = ERROR_OK;
uint32_t dscr;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
dap_ap_select(swjdp, swjdp_debugap);
@@ -664,7 +664,7 @@ static int cortex_a8_resume(struct target *target, int current,
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
// struct breakpoint *breakpoint = NULL;
uint32_t resume_pc, dscr;
@@ -788,7 +788,7 @@ static int cortex_a8_debug_entry(struct target *target)
struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
struct reg *reg;
LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a8->cpudbg_dscr);
@@ -1276,7 +1276,7 @@ static int cortex_a8_read_memory(struct target *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
int retval = ERROR_INVALID_ARGUMENTS;
/* cortex_a8 handles unaligned memory access */
@@ -1304,7 +1304,7 @@ static int cortex_a8_write_memory(struct target *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
int retval = ERROR_INVALID_ARGUMENTS;
// ??? dap_ap_select(swjdp, swjdp_memoryap);
@@ -1386,7 +1386,7 @@ static int cortex_a8_bulk_write_memory(struct target *target, uint32_t address,
}
static int cortex_a8_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_t *ctrl)
static int cortex_a8_dcc_read(struct adiv5_dap *swjdp, uint8_t *value, uint8_t *ctrl)
{
#if 0
u16 dcrdr;
@@ -1413,7 +1413,7 @@ static int cortex_a8_handle_target_request(void *priv)
{
struct target *target = priv;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
if (!target_was_examined(target))
return ERROR_OK;
@@ -1455,7 +1455,7 @@ static int cortex_a8_examine_first(struct target *target)
{
struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
int i;
int retval = ERROR_OK;
uint32_t didr, ctypr, ttypr, cpuid;
@@ -1562,7 +1562,7 @@ static int cortex_a8_init_arch_info(struct target *target,
{
struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct arm *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct adiv5_dap *swjdp = &armv7a->swjdp_info;
/* Setup struct cortex_a8_common */
cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC;