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retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERROR

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Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/300
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Øyvind Harboe
2011-12-28 12:56:08 +01:00
committed by Spencer Oliver
parent 54d6330b78
commit 4668bd264c
36 changed files with 166 additions and 167 deletions
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8
src/target/arm7_9_common.c
View File

@@ -2142,7 +2142,7 @@ static int arm7_9_read_core_reg(struct target *target, struct reg *r,
if (!is_arm_mode(armv4_5->core_mode))
return ERROR_FAIL;
if ((num < 0) || (num > 16))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if ((mode != ARM_MODE_ANY)
&& (mode != armv4_5->core_mode)
@@ -2205,7 +2205,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
if (!is_arm_mode(armv4_5->core_mode))
return ERROR_FAIL;
if ((num < 0) || (num > 16))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if ((mode != ARM_MODE_ANY)
&& (mode != armv4_5->core_mode)
@@ -2277,7 +2277,7 @@ int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, u
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -2457,7 +2457,7 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;

10
src/target/arm_adi_v5.c
View File

@@ -1272,7 +1272,7 @@ int dap_get_debugbase(struct adiv5_dap *dap, int ap,
/* AP address is in bits 31:24 of DP_SELECT */
if (ap >= 256)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
ap_old = dap->ap_current;
dap_ap_select(dap, ap);
@@ -1315,7 +1315,7 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
int retval = ERROR_FAIL;
if (ap >= 256)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
ap_old = dap->ap_current;
dap_ap_select(dap, ap);
@@ -1799,7 +1799,7 @@ COMMAND_HANDLER(dap_baseaddr_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
/* AP address is in bits 31:24 of DP_SELECT */
if (apsel >= 256)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1867,7 +1867,7 @@ COMMAND_HANDLER(dap_apsel_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
/* AP address is in bits 31:24 of DP_SELECT */
if (apsel >= 256)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -1906,7 +1906,7 @@ COMMAND_HANDLER(dap_apid_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
/* AP address is in bits 31:24 of DP_SELECT */
if (apsel >= 256)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;

58
src/target/arm_disassembler.c
View File

@@ -3013,7 +3013,7 @@ static int t2ev_misc(uint32_t opcode, uint32_t address,
mnemonic = "ISB";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
strcpy(cp, mnemonic);
return ERROR_OK;
@@ -3064,7 +3064,7 @@ static int t2ev_b_misc(uint32_t opcode, uint32_t address,
}
undef:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
@@ -3199,7 +3199,7 @@ static int t2ev_data_mod_immed(uint32_t opcode, uint32_t address,
suffix2 = ".W";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (one)
@@ -3288,7 +3288,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
(int) (opcode & 0x1f) + 1 - immed);
return ERROR_OK;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
sprintf(cp, "%s\tr%d, r%d, #%d\t; %#3.3x", mnemonic,
@@ -3321,7 +3321,7 @@ static int t2ev_store_single(uint32_t opcode, uint32_t address,
unsigned rt = (opcode >> 12) & 0x0f;
if (rn == 0xf)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (opcode & 0x0800)
op |= 1;
@@ -3358,7 +3358,7 @@ static int t2ev_store_single(uint32_t opcode, uint32_t address,
break;
/* error */
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
sprintf(cp, "STR%s.W\tr%d, [r%d, r%d, LSL #%d]",
@@ -3381,7 +3381,7 @@ imm8:
break;
case 0x000:
case 0x200:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
/* two indexed modes will write back rn */
@@ -3426,7 +3426,7 @@ static int t2ev_mul32(uint32_t opcode, uint32_t address,
(int) (opcode >> 0) & 0xf, ra);
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
}
@@ -3462,7 +3462,7 @@ static int t2ev_mul64_div(uint32_t opcode, uint32_t address,
(int) (opcode >> 0) & 0xf);
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
@@ -3516,7 +3516,7 @@ static int t2ev_ldm_stm(uint32_t opcode, uint32_t address,
sprintf(cp, "LDMDB.W\tr%d%s, ", rn, t ? "!" : "");
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
cp = strchr(cp, 0);
@@ -3584,7 +3584,7 @@ static int t2ev_ldrex_strex(uint32_t opcode, uint32_t address,
mnemonic = "STREXH";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
rd = opcode & 0xf;
imm = 0;
@@ -3604,12 +3604,12 @@ static int t2ev_ldrex_strex(uint32_t opcode, uint32_t address,
mnemonic = "LDREXH";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
imm = 0;
goto ldrex;
}
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
strex:
imm <<= 2;
@@ -3680,7 +3680,7 @@ static int t2ev_data_shift(uint32_t opcode, uint32_t address,
case 0:
if (rd == 0xf) {
if (!(opcode & (1 << 20)))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
instruction->type = ARM_TST;
mnemonic = "TST";
suffix = "";
@@ -3742,7 +3742,7 @@ static int t2ev_data_shift(uint32_t opcode, uint32_t address,
case 4:
if (rd == 0xf) {
if (!(opcode & (1 << 20)))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
instruction->type = ARM_TEQ;
mnemonic = "TEQ";
suffix = "";
@@ -3754,7 +3754,7 @@ static int t2ev_data_shift(uint32_t opcode, uint32_t address,
case 8:
if (rd == 0xf) {
if (!(opcode & (1 << 20)))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
instruction->type = ARM_CMN;
mnemonic = "CMN";
suffix = "";
@@ -3774,7 +3774,7 @@ static int t2ev_data_shift(uint32_t opcode, uint32_t address,
case 0xd:
if (rd == 0xf) {
if (!(opcode & (1 << 21)))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
instruction->type = ARM_CMP;
mnemonic = "CMP";
suffix = "";
@@ -3788,7 +3788,7 @@ static int t2ev_data_shift(uint32_t opcode, uint32_t address,
mnemonic = "RSB";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
sprintf(cp, "%s%s.W\tr%d, r%d, r%d",
@@ -3857,7 +3857,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
mnemonic = "ROR";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
instruction->type = ARM_MOV;
@@ -3898,11 +3898,11 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
case 0xa:
case 0xb:
if (opcode & (1 << 6))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((opcode >> 12) & 0xf) != 0xf)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (!(opcode & (1 << 20)))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
switch (((opcode >> 19) & 0x04)
| ((opcode >> 4) & 0x3)) {
@@ -3922,7 +3922,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
mnemonic = "CLZ";
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
sprintf(cp, "%s\tr%d, r%d",
mnemonic,
@@ -3930,7 +3930,7 @@ static int t2ev_data_reg(uint32_t opcode, uint32_t address,
(int) (opcode >> 0) & 0xf);
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -3986,7 +3986,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
char *p1 = "]", *p2 = "";
if (!(opcode & 0x0500))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
immed = opcode & 0x00ff;
@@ -4008,7 +4008,7 @@ static int t2ev_load_word(uint32_t opcode, uint32_t address,
return ERROR_OK;
}
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
static int t2ev_load_byte_hints(uint32_t opcode, uint32_t address,
@@ -4187,7 +4187,7 @@ ldrsb_literal:
goto ldrxb_immediate_t2;
}
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
static int t2ev_load_halfword(uint32_t opcode, uint32_t address,
@@ -4265,7 +4265,7 @@ ldrh_literal:
return ERROR_OK;
}
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
/*
@@ -4377,7 +4377,7 @@ int thumb2_opcode(struct target *target, uint32_t address, struct arm_instructio
* instructions; not yet handled here.
*/
if (retval == ERROR_INVALID_ARGUMENTS) {
if (retval == ERROR_COMMAND_SYNTAX_ERROR) {
instruction->type = ARM_UNDEFINED_INSTRUCTION;
strcpy(cp, "UNDEFINED OPCODE");
return ERROR_OK;

12
src/target/arm_dpm.c
View File

@@ -536,7 +536,7 @@ static int arm_dpm_read_core_reg(struct target *target, struct reg *r,
int retval;
if (regnum < 0 || regnum > 16)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (regnum == 16) {
if (mode != ARM_MODE_ANY)
@@ -579,7 +579,7 @@ static int arm_dpm_write_core_reg(struct target *target, struct reg *r,
if (regnum < 0 || regnum > 16)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (regnum == 16) {
if (mode != ARM_MODE_ANY)
@@ -729,7 +729,7 @@ static int dpm_bpwp_setup(struct arm_dpm *dpm, struct dpm_bpwp *xp,
/* FALL THROUGH */
default:
LOG_ERROR("unsupported {break,watch}point length/alignment");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
/* other shared control bits:
@@ -756,7 +756,7 @@ static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp)
int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
if (bp->length < 2)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (!dpm->bpwp_enable)
return retval;
@@ -781,7 +781,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
{
struct arm *arm = target_to_arm(target);
struct arm_dpm *dpm = arm->dpm;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
for (unsigned i = 0; i < dpm->nbp; i++) {
if (dpm->dbp[i].bp == bp) {
@@ -855,7 +855,7 @@ static int dpm_remove_watchpoint(struct target *target, struct watchpoint *wp)
{
struct arm *arm = target_to_arm(target);
struct arm_dpm *dpm = arm->dpm;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
for (unsigned i = 0; i < dpm->nwp; i++) {
if (dpm->dwp[i].wp == wp) {

10
src/target/armv4_5.c
View File

@@ -1185,13 +1185,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if ((retval = armv4_5_set_core_reg(reg, reg_params[i].value)) != ERROR_OK)
@@ -1208,7 +1208,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
else
{
LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (arm_algorithm_info->core_mode != ARM_MODE_ANY)
@@ -1260,14 +1260,14 @@ int armv4_5_run_algorithm_inner(struct target *target,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
retval = ERROR_INVALID_ARGUMENTS;
retval = ERROR_COMMAND_SYNTAX_ERROR;
continue;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
retval = ERROR_INVALID_ARGUMENTS;
retval = ERROR_COMMAND_SYNTAX_ERROR;
continue;
}

2
src/target/armv7a.c
View File

@@ -748,7 +748,7 @@ int armv7a_arch_state(struct target *target)
if (armv7a->common_magic != ARMV7_COMMON_MAGIC)
{
LOG_ERROR("BUG: called for a non-ARMv7A target");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
arm_arch_state(target);

12
src/target/armv7m.c
View File

@@ -206,7 +206,7 @@ static int armv7m_read_core_reg(struct target *target, unsigned num)
struct armv7m_common *armv7m = target_to_armv7m(target);
if (num >= ARMV7M_NUM_REGS)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
retval = armv7m->load_core_reg_u32(target, armv7m_core_reg->type, armv7m_core_reg->num, &reg_value);
@@ -225,7 +225,7 @@ static int armv7m_write_core_reg(struct target *target, unsigned num)
struct armv7m_common *armv7m = target_to_armv7m(target);
if (num >= ARMV7M_NUM_REGS)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = buf_get_u32(armv7m->core_cache->reg_list[num].value, 0, 32);
armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
@@ -363,13 +363,13 @@ int armv7m_start_algorithm(struct target *target,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
// regvalue = buf_get_u32(reg_params[i].value, 0, 32);
@@ -452,13 +452,13 @@ int armv7m_wait_algorithm(struct target *target,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));

8
src/target/avr32_ap7k.c
View File

@@ -115,7 +115,7 @@ static int avr32_read_core_reg(struct target *target, int num)
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
if ((num < 0) || (num >= AVR32NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = ap7k->core_regs[num];
buf_set_u32(ap7k->core_cache->reg_list[num].value, 0, 32, reg_value);
@@ -133,7 +133,7 @@ static int avr32_write_core_reg(struct target *target, int num)
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
if ((num < 0) || (num >= AVR32NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = buf_get_u32(ap7k->core_cache->reg_list[num].value, 0, 32);
ap7k->core_regs[num] = reg_value;
@@ -487,7 +487,7 @@ static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -525,7 +525,7 @@ static int avr32_ap7k_write_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;

8
src/target/cortex_a.c
View File

@@ -1906,7 +1906,7 @@ static int cortex_a8_write_apb_ab_memory(struct target *target,
/* write memory through APB-AP */
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *armv4_5 = &armv7a->armv4_5_common;
int total_bytes = count * size;
@@ -1979,7 +1979,7 @@ static int cortex_a8_read_apb_ab_memory(struct target *target,
/* read memory through APB-AP */
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *armv4_5 = &armv7a->armv4_5_common;
int total_bytes = count * size;
@@ -2047,7 +2047,7 @@ static int cortex_a8_read_phys_memory(struct target *target,
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct adiv5_dap *swjdp = armv7a->armv4_5_common.dap;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
uint8_t apsel = swjdp->apsel;
LOG_DEBUG("Reading memory at real address 0x%x; size %d; count %d",
address, size, count);
@@ -2132,7 +2132,7 @@ static int cortex_a8_write_phys_memory(struct target *target,
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct adiv5_dap *swjdp = armv7a->armv4_5_common.dap;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
uint8_t apsel = swjdp->apsel;
LOG_DEBUG("Writing memory to real address 0x%x; size %d; count %d", address,

10
src/target/cortex_m.c
View File

@@ -1593,7 +1593,7 @@ static int cortex_m3_load_core_reg_u32(struct target *target,
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
@@ -1673,7 +1673,7 @@ static int cortex_m3_store_core_reg_u32(struct target *target,
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
@@ -1684,7 +1684,7 @@ static int cortex_m3_read_memory(struct target *target, uint32_t address,
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct adiv5_dap *swjdp = &armv7m->dap;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
/* cortex_m3 handles unaligned memory access */
if (count && buffer) {
@@ -1709,7 +1709,7 @@ static int cortex_m3_write_memory(struct target *target, uint32_t address,
{
struct armv7m_common *armv7m = target_to_armv7m(target);
struct adiv5_dap *swjdp = &armv7m->dap;
int retval = ERROR_INVALID_ARGUMENTS;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
if (count && buffer) {
switch (size) {
@@ -2144,7 +2144,7 @@ COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
}
if (i == ARRAY_SIZE(vec_ids)) {
LOG_ERROR("No CM3 vector '%s'", CMD_ARGV[CMD_ARGC]);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
write:

26
src/target/dsp563xx.c
View File

@@ -336,7 +336,7 @@ static int dsp563xx_get_gdb_reg_list(struct target *target, struct reg **reg_lis
*reg_list = malloc(sizeof(struct reg *) * (*reg_list_size));
if (!*reg_list)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
for (i = 0; i < DSP563XX_NUMCOREREGS; i++)
{
@@ -353,7 +353,7 @@ static int dsp563xx_read_core_reg(struct target *target, int num)
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if ((num < 0) || (num >= DSP563XX_NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = dsp563xx->core_regs[num];
buf_set_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32, reg_value);
@@ -369,7 +369,7 @@ static int dsp563xx_write_core_reg(struct target *target, int num)
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if ((num < 0) || (num >= DSP563XX_NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = buf_get_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32);
dsp563xx->core_regs[num] = reg_value;
@@ -859,7 +859,7 @@ static int dsp563xx_target_create(struct target *target, Jim_Interp * interp)
struct dsp563xx_common *dsp563xx = calloc(1, sizeof(struct dsp563xx_common));
if (!dsp563xx)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
dsp563xx->jtag_info.tap = target->tap;
target->arch_info = dsp563xx;
@@ -886,7 +886,7 @@ static int dsp563xx_examine(struct target *target)
{
LOG_ERROR("no IDCODE present on device");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (!target_was_examined(target))
@@ -1480,7 +1480,7 @@ static int dsp563xx_read_memory_core(struct target *target, int mem_type, uint32
move_cmd = 0x07d891;
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
/* we use r0 to store temporary data */
@@ -1556,7 +1556,7 @@ static int dsp563xx_read_memory(struct target *target, int mem_type, uint32_t ad
/* we only support 4 byte aligned data */
if ( (size != 4) || (!count) )
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if ( mem_type != MEM_L )
@@ -1566,13 +1566,13 @@ static int dsp563xx_read_memory(struct target *target, int mem_type, uint32_t ad
if ( !(buffer_y = malloc(size*count)) )
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if ( !(buffer_x = malloc(size*count)) )
{
free(buffer_y);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
err = dsp563xx_read_memory_core(target,MEM_Y,address,size,count/2,buffer_y);
@@ -1647,7 +1647,7 @@ static int dsp563xx_write_memory_core(struct target *target, int mem_type, uint3
move_cmd = 0x075891;
break;
default:
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
/* we use r0 to store temporary data */
@@ -1716,7 +1716,7 @@ static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t a
/* we only support 4 byte aligned data */
if ( (size != 4) || (!count) )
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if ( mem_type != MEM_L )
@@ -1726,13 +1726,13 @@ static int dsp563xx_write_memory(struct target *target, int mem_type, uint32_t a
if ( !(buffer_y = malloc(size*count)) )
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if ( !(buffer_x = malloc(size*count)) )
{
free(buffer_y);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
for(i=0,i1=0;i<count;i+=2,i1++)

2
src/target/embeddedice.c
View File

@@ -589,7 +589,7 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
else
{
LOG_ERROR("Invalid arguments");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);

8
src/target/etm.c
View File

@@ -499,7 +499,7 @@ static int etm_read_reg_w_check(struct reg *reg,
if (etm_reg->reg_info->mode == WO) {
LOG_ERROR("BUG: can't read write-only register %s", r->name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
LOG_DEBUG("%s (%u)", r->name, reg_addr);
@@ -585,7 +585,7 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
if (etm_reg->reg_info->mode == RO) {
LOG_ERROR("BUG: can't write read--only register %s", r->name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
LOG_DEBUG("%s (%u): 0x%8.8" PRIx32 "", r->name, reg_addr, value);
@@ -1196,7 +1196,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
else
{
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[0]);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
uint8_t context_id;
@@ -1217,7 +1217,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
break;
default:
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[1]);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
bool etmv1_cycle_accurate;

6
src/target/image.c
View File

@@ -902,7 +902,7 @@ int image_read_section(struct image *image, int section, uint32_t offset, uint32
{
LOG_DEBUG("read past end of section: 0x%8.8" PRIx32 " + 0x%8.8" PRIx32 " > 0x%8.8" PRIx32 "",
offset, size, image->sections[section].size);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (image->type == IMAGE_BINARY)
@@ -911,7 +911,7 @@ int image_read_section(struct image *image, int section, uint32_t offset, uint32
/* only one section in a plain binary */
if (section != 0)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
/* seek to offset */
if ((retval = fileio_seek(&image_binary->fileio, offset)) != ERROR_OK)
@@ -999,7 +999,7 @@ int image_add_section(struct image *image, uint32_t base, uint32_t size, int fla
/* only image builder supports adding sections */
if (image->type != IMAGE_BUILDER)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
/* see if there's a previous section */
if (image->num_sections)

12
src/target/mips32.c
View File

@@ -151,7 +151,7 @@ static int mips32_read_core_reg(struct target *target, int num)
struct mips32_common *mips32 = target_to_mips32(target);
if ((num < 0) || (num >= MIPS32NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = mips32->core_regs[num];
buf_set_u32(mips32->core_cache->reg_list[num].value, 0, 32, reg_value);
@@ -169,7 +169,7 @@ static int mips32_write_core_reg(struct target *target, int num)
struct mips32_common *mips32 = target_to_mips32(target);
if ((num < 0) || (num >= MIPS32NUMCOREREGS))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
mips32->core_regs[num] = reg_value;
@@ -411,14 +411,14 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
mips32_set_core_reg(reg, reg_params[i].value);
@@ -451,14 +451,14 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size",
reg_params[i].reg_name);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));

4
src/target/mips_m4k.c
View File

@@ -865,7 +865,7 @@ static int mips_m4k_read_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -932,7 +932,7 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;

10
src/target/target.c
View File

@@ -1074,7 +1074,7 @@ int target_register_event_callback(int (*callback)(struct target *target, enum t
if (callback == NULL)
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (*callbacks_p)
@@ -1099,7 +1099,7 @@ int target_register_timer_callback(int (*callback)(void *priv), int time_ms, int
if (callback == NULL)
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (*callbacks_p)
@@ -1137,7 +1137,7 @@ int target_unregister_event_callback(int (*callback)(struct target *target, enum
if (callback == NULL)
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
while (c)
@@ -1164,7 +1164,7 @@ static int target_unregister_timer_callback(int (*callback)(void *priv), void *p
if (callback == NULL)
{
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
while (c)
@@ -1681,7 +1681,7 @@ int target_checksum_memory(struct target *target, uint32_t address, uint32_t siz
if (buffer == NULL)
{
LOG_ERROR("error allocating buffer for section (%d bytes)", (int)size);
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
retval = target_read_buffer(target, address, size, buffer);
if (retval != ERROR_OK)

2
src/target/target_request.c
View File

@@ -168,7 +168,7 @@ static int add_debug_msg_receiver(struct command_context *cmd_ctx, struct target
struct debug_msg_receiver **p = &target->dbgmsg;
if (target == NULL)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
/* see if there's already a list */
if (*p)

20
src/target/xscale.c
View File

@@ -250,7 +250,7 @@ static void xscale_getbuf(jtag_callback_data_t arg)
static int xscale_receive(struct target *target, uint32_t *buffer, int num_words)
{
if (num_words == 0)
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
struct xscale_common *xscale = target_to_xscale(target);
int retval = ERROR_OK;
@@ -577,7 +577,7 @@ static int xscale_send(struct target *target, const uint8_t *buffer, int count,
break;
default:
LOG_ERROR("BUG: size neither 4, 2 nor 1");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
jtag_add_dr_out(target->tap,
3,
@@ -840,7 +840,7 @@ static int xscale_arch_state(struct target *target)
if (armv4_5->common_magic != ARM_COMMON_MAGIC)
{
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
arm_arch_state(target);
@@ -1871,7 +1871,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -1911,7 +1911,7 @@ static int xscale_read_memory(struct target *target, uint32_t address,
break;
default:
LOG_ERROR("invalid read size");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -1963,7 +1963,7 @@ static int xscale_write_memory(struct target *target, uint32_t address,
/* sanitize arguments */
if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer))
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -3513,7 +3513,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
else if (strcmp("disable", CMD_ARGV[0]) == 0)
xscale->trace.mode = XSCALE_TRACE_DISABLED;
else
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (CMD_ARGC >= 2 && xscale->trace.mode != XSCALE_TRACE_DISABLED)
@@ -3527,7 +3527,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
{
command_print(CMD_CTX, "fill buffer count must be > 0");
xscale->trace.mode = XSCALE_TRACE_DISABLED;
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
xscale->trace.buffer_fill = buffcount;
xscale->trace.mode = XSCALE_TRACE_FILL;
@@ -3537,7 +3537,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
else
{
xscale->trace.mode = XSCALE_TRACE_DISABLED;
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -3730,7 +3730,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
break;
default:
command_print(CMD_CTX, "invalid register number");
return ERROR_INVALID_ARGUMENTS;
return ERROR_COMMAND_SYNTAX_ERROR;
}
reg = &xscale->reg_cache->reg_list[reg_no];