target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5766 Tested-by: jenkins
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@@ -55,8 +55,8 @@
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* shadowed registers, and support for the Thumb instruction set.
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*
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* Processor differences include things like presence or absence of MMU
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* and cache, pipeline sizes, use of a modified Harvard Architecure
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* (with separate instruction and data busses from the CPU), support
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* and cache, pipeline sizes, use of a modified Harvard Architecture
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* (with separate instruction and data buses from the CPU), support
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* for cpu clock gating during idle, and more.
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*/
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@@ -1009,7 +1009,7 @@ int arm7_9_deassert_reset(struct target *target)
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/**
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* Clears the halt condition for an ARM7/9 target. If it isn't coming out of
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* reset and if DBGRQ is used, it is progammed to be deasserted. If the reset
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* reset and if DBGRQ is used, it is programmed to be deasserted. If the reset
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* vector catch was used, it is restored. Otherwise, the control value is
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* restored and the watchpoint unit is restored if it was in use.
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*
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