Various doc/comment updates
Doxygen: don't be needlessly verbose; alphabetically sort members TODO: add random bits; clarify which manuals are referenced ARM disassembler: mention a few opcodes that still aren't handled Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@@ -50,6 +50,7 @@
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* except as coprocessor 10/11 operations
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* * Most ARM instructions through ARMv6 are decoded, but some
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* of the post-ARMv4 opcodes may not be handled yet
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* CPS, SDIV, UDIV, LDREX*, STREX*, QASX, ...
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* * NEON instructions are not understood (ARMv7-A)
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*
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* - Thumb/Thumb2 decoding
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