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arm_adi_v5: Remove all mem_ap_sel_* functions

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All mem_ap_* functions now make sure the SELECT register is updated with
the AP number that it's operating on. This shouldn't have to be handled
explicitly.

Change-Id: Ib193d8930fabb6a25715064355f98258c9580b5d
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This commit is contained in:
Andreas Fritiofson
2015-12-28 18:43:22 +01:00
parent 4da8915fb9
commit 4a7bb931e3
6 changed files with 178 additions and 206 deletions
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6
src/flash/nor/at91sam4l.c
View File

@@ -659,14 +659,14 @@ COMMAND_HANDLER(sam4l_handle_reset_deassert)
* After vectreset SMAP release is not needed however makes no harm
*/
if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
retval = mem_ap_sel_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
if (retval == ERROR_OK)
retval = mem_ap_sel_write_atomic_u32(armv7m->debug_ap, DCB_DEMCR,
retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DEMCR,
TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
/* do not return on error here, releasing SMAP reset is more important */
}
int retval2 = mem_ap_sel_write_atomic_u32(armv7m->debug_ap, SMAP_SCR, SMAP_SCR_HCR);
int retval2 = mem_ap_write_atomic_u32(armv7m->debug_ap, SMAP_SCR, SMAP_SCR_HCR);
if (retval2 != ERROR_OK)
return retval2;

4
src/flash/nor/at91samd.c
View File

@@ -999,9 +999,9 @@ COMMAND_HANDLER(samd_handle_reset_deassert)
* After vectreset DSU release is not needed however makes no harm
*/
if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
retval = mem_ap_sel_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
if (retval == ERROR_OK)
retval = mem_ap_sel_write_u32(armv7m->debug_ap, DCB_DEMCR,
retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR,
TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
/* do not return on error here, releasing DSU reset is more important */
}