esirisc: support eSi-RISC targets
eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
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Matthias Welwarsky
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129
src/target/esirisc.h
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129
src/target/esirisc.h
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/***************************************************************************
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* Copyright (C) 2018 by Square, Inc. *
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* Steven Stallion <stallion@squareup.com> *
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* James Zhao <hjz@squareup.com> *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_ESIRISC_H
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#define OPENOCD_TARGET_ESIRISC_H
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#include <target/breakpoints.h>
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#include <target/register.h>
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#include <target/target.h>
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#include "esirisc_jtag.h"
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#include "esirisc_regs.h"
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#define MAX_BREAKPOINTS 8
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#define MAX_WATCHPOINTS 8
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/* Exception IDs */
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#define EID_RESET 0x00
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#define EID_HARDWARE_FAILURE 0x01
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#define EID_NMI 0x02
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#define EID_INST_BREAKPOINT 0x03
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#define EID_DATA_BREAKPOINT 0x04
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#define EID_UNSUPPORTED 0x05
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#define EID_PRIVILEGE_VIOLATION 0x06
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#define EID_INST_BUS_ERROR 0x07
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#define EID_DATA_BUS_ERROR 0x08
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#define EID_ALIGNMENT_ERROR 0x09
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#define EID_ARITHMETIC_ERROR 0x0a
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#define EID_SYSTEM_CALL 0x0b
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#define EID_MEMORY_MANAGEMENT 0x0c
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#define EID_UNRECOVERABLE 0x0d
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#define EID_INTERRUPTn 0x20
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/* Exception Entry Points */
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#define ENTRY_RESET 0x00
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#define ENTRY_UNRECOVERABLE 0x01
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#define ENTRY_HARDWARE_FAILURE 0x02
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#define ENTRY_RUNTIME 0x03
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#define ENTRY_MEMORY 0x04
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#define ENTRY_SYSCALL 0x05
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#define ENTRY_DEBUG 0x06
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#define ENTRY_NMI 0x07
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#define ENTRY_INTERRUPTn 0x08
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/* Hardware Debug Control */
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#define HWDC_R (1<<4) /* Reset & Hardware Failure */
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#define HWDC_I (1<<3) /* Interrupts */
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#define HWDC_S (1<<2) /* System Calls */
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#define HWDC_E (1<<1) /* Program Errors */
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#define HWDC_D (1<<0) /* Debug Exceptions */
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enum esirisc_cache {
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ESIRISC_CACHE_VON_NEUMANN,
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ESIRISC_CACHE_HARVARD,
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};
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struct esirisc_common {
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struct target *target;
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struct esirisc_jtag jtag_info;
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enum esirisc_cache cache_arch;
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char *gdb_arch;
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struct reg_cache *reg_cache;
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struct reg *epc;
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struct reg *ecas;
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struct reg *eid;
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struct reg *ed;
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uint32_t etc_save;
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uint32_t hwdc_save;
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int num_bits;
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int num_regs;
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bool has_icache;
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bool has_dcache;
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int num_breakpoints;
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int num_watchpoints;
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struct breakpoint *breakpoints_p[MAX_BREAKPOINTS];
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struct watchpoint *watchpoints_p[MAX_WATCHPOINTS];
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};
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union esirisc_memory {
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uint32_t word;
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uint16_t hword;
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uint8_t byte;
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};
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struct esirisc_reg {
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struct esirisc_common *esirisc;
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uint8_t bank;
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uint8_t csr;
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int (*read)(struct reg *reg);
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int (*write)(struct reg *reg);
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};
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static inline struct esirisc_common *target_to_esirisc(struct target *target)
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{
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return (struct esirisc_common *)target->arch_info;
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}
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static inline char *esirisc_cache_arch(struct esirisc_common *esirisc)
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{
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return esirisc->cache_arch == ESIRISC_CACHE_HARVARD ? "harvard" : "von_neumann";
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}
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static inline bool esirisc_has_cache(struct esirisc_common *esirisc)
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{
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return esirisc->has_icache || esirisc->has_dcache;
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}
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#endif /* OPENOCD_TARGET_ESIRISC_H */
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