tcl: fix minor typos and repeated words
Detected with checkpatch. Change-Id: Id306928496cf70bbe7ff065bf726bc7dceadce26 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8409 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
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@@ -43,7 +43,7 @@ proc read_register {register} {
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proc at91sam9g20_reset_start { } {
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# Make sure that the the jtag is running slow, since there are a number of different ways the board
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# Make sure that the jtag is running slow, since there are a number of different ways the board
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# can be configured coming into this state that can cause communication problems with the jtag
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# adapter. Also since this call can be made following a "reset init" where fast memory accesses
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# are enabled, need to temporarily shut this down so that the RSTC_MR register can be written at slower
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@@ -202,7 +202,7 @@ proc at91sam9g20_reset_init { } {
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mww 0xffffea00 0x3
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mww 0x20000000 0
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# Signal normal mode using the SDRAMC_MR register and follow with a zero value write the the starting
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# Signal normal mode using the SDRAMC_MR register and follow with a zero value write the starting
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# memory location for the SDRAM.
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mww 0xffffea00 0x0
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@@ -27,7 +27,7 @@ $_TARGETNAME configure -event reset-init {
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# 0x00003800 - 0x07 << FLASHCTL_WST2_S
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# FLASHCTL_AC_8M 0x00060000 - Size of flash
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# FLASHCTL_E 0x00080000 - Flash bank enable (added)
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# FLASHCTL_WP 0x04000000 - write protect. If used, CFI mode wont work!!
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# FLASHCTL_WP 0x04000000 - write protect. If used, CFI mode won't work!!
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# FLASHCTL_MWx16 0x10000000 - 16bit mode. Do not use it!!
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# FLASHCTL_MWx8 0x00000000 - 8bit mode.
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mww 0xb8400000 0x000d3ce1
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