auracaster/openocd
3
0
Fork 1
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

flash/stm32l4x: support STM32C0x devices

Browse Source 
this new STM32 series family introduces 2 devices:
STM32C011xx (0x443) and STM32C031xx (0x453)

both devices have 32 Kbytes single flash bank.

Change-Id: I4e890789e44e3b174c0e9c0e1068383ecdbb865f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6874
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tarek BOCHKATI
2021-12-03 12:58:33 +01:00
committed by Tomas Vanek
parent 5c46a5de49
commit 4defa3b1e3
3 changed files with 118 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

43
src/flash/nor/stm32l4x.c
View File

@@ -80,6 +80,12 @@
* http://www.st.com/resource/en/reference_manual/dm00451556.pdf
*/
/* STM32C0xxx series for reference.
*
* RM0490 (STM32C0x1)
* http://www.st.com/resource/en/reference_manual/dm00781702.pdf
*/
/* STM32G0xxx series for reference.
*
* RM0444 (STM32G0x1)
@@ -263,7 +269,7 @@ struct stm32l4_wrp {
};
/* human readable list of families this drivers supports (sorted alphabetically) */
static const char *device_families = "STM32G0/G4/L4/L4+/L5/U5/WB/WL";
static const char *device_families = "STM32C0/G0/G4/L4/L4+/L5/U5/WB/WL";
static const struct stm32l4_rev stm32l47_l48xx_revs[] = {
{ 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" }
@@ -273,6 +279,15 @@ static const struct stm32l4_rev stm32l43_l44xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x2001, "Y" },
};
static const struct stm32l4_rev stm32c01xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" },
};
static const struct stm32l4_rev stm32c03xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" },
};
static const struct stm32l4_rev stm32g05_g06xx_revs[] = {
{ 0x1000, "A" },
};
@@ -371,6 +386,30 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
{
.id = DEVID_STM32C01XX,
.revs = stm32c01xx_revs,
.num_revs = ARRAY_SIZE(stm32c01xx_revs),
.device_str = "STM32C01xx",
.max_flash_size_kb = 32,
.flags = F_NONE,
.flash_regs_base = 0x40022000,
.fsize_addr = 0x1FFF75A0,
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
{
.id = DEVID_STM32C03XX,
.revs = stm32c03xx_revs,
.num_revs = ARRAY_SIZE(stm32c03xx_revs),
.device_str = "STM32C03xx",
.max_flash_size_kb = 32,
.flags = F_NONE,
.flash_regs_base = 0x40022000,
.fsize_addr = 0x1FFF75A0,
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
{
.id = DEVID_STM32G05_G06XX,
.revs = stm32g05_g06xx_revs,
@@ -1855,6 +1894,8 @@ static int stm32l4_probe(struct flash_bank *bank)
}
break;
case DEVID_STM32L43_L44XX:
case DEVID_STM32C01XX:
case DEVID_STM32C03XX:
case DEVID_STM32G05_G06XX:
case DEVID_STM32G07_G08XX:
case DEVID_STM32L45_L46XX:

2
src/flash/nor/stm32l4x.h
View File

@@ -87,6 +87,8 @@
/* Supported device IDs */
#define DEVID_STM32L47_L48XX 0x415
#define DEVID_STM32L43_L44XX 0x435
#define DEVID_STM32C01XX 0x443
#define DEVID_STM32C03XX 0x453
#define DEVID_STM32G05_G06XX 0x456
#define DEVID_STM32G07_G08XX 0x460
#define DEVID_STM32L49_L4AXX 0x461