auracaster/openocd
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- Replace 'while(' with 'while ('.

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git-svn-id: svn://svn.berlios.de/openocd/trunk@2358 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch
2009-06-23 22:36:11 +00:00
parent e43979e702
commit 50c086ffb9
24 changed files with 124 additions and 124 deletions
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12
src/target/mips32_dmaacc.c
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@@ -61,7 +61,7 @@ begin_ejtag_dma_read:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -107,7 +107,7 @@ begin_ejtag_dma_read_h:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -159,7 +159,7 @@ begin_ejtag_dma_read_b:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
@@ -226,7 +226,7 @@ begin_ejtag_dma_write:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -277,7 +277,7 @@ begin_ejtag_dma_write_h:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
@@ -329,7 +329,7 @@ begin_ejtag_dma_write_b:
do {
ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
} while(ejtag_ctrl & EJTAG_CTRL_DSTRT);
} while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);