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ARMv7a/Cortex-A8: report watchpoint trigger insn

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Save and display the address of the instruction which triggered the
watchpoint.  Because of pipelining, that's well behind the PC value
when debug entry completes.  (Example in a subroutine that had been
returned from...)

Remove unused A8 stuff, mostly watchpoint hooks from the header.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2009-12-02 11:31:32 -08:00
parent 03c103d56a
commit 55eeea7fce
5 changed files with 33 additions and 44 deletions
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22
src/target/cortex_a8.h
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@@ -54,15 +54,6 @@ struct cortex_a8_brp
uint8_t BRPn;
};
struct cortex_a8_wrp
{
int used;
int type;
uint32_t value;
uint32_t control;
uint8_t WRPn;
};
struct cortex_a8_common
{
int common_magic;
@@ -70,29 +61,16 @@ struct cortex_a8_common
/* Context information */
uint32_t cpudbg_dscr;
uint32_t nvic_dfsr; /* Debug Fault Status Register - shows reason for debug halt */
uint32_t nvic_icsr; /* Interrupt Control State Register - shows active and pending IRQ */
/* Saved cp15 registers */
uint32_t cp15_control_reg;
uint32_t cp15_aux_control_reg;
/* Breakpoint register pairs */
int brp_num_context;
int brp_num;
int brp_num_available;
// int brp_enabled;
struct cortex_a8_brp *brp_list;
/* Watchpoint register pairs */
int wrp_num;
int wrp_num_available;
struct cortex_a8_wrp *wrp_list;
/* Interrupts */
int intlinesnum;
uint32_t *intsetenable;
/* Use cortex_a8_read_regs_through_mem for fast register reads */
int fast_reg_read;