target: riscv: Drop new typedefs added by the updated riscv-debug-spec files

The advantage of this patch is that it brings the new code closer to
OpenOCD coding style - the disadvantage is that it involves modifying
autogenerated files, making it harder to drop in new versions when
riscv-debug-spec changes.

Change-Id: I4c317e11ab1652333b0bb44168f953ef452d3ef5
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8896
Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
This commit is contained in:
Bernhard Rosenkränzer
2025-05-06 01:34:18 +02:00
committed by Tomas Vanek
parent 5754aebc49
commit 56141bb349
6 changed files with 496 additions and 496 deletions

View File

@@ -27,14 +27,14 @@ enum riscv_debug_reg_show {
* (excluding '\0').
*
* Example:
* const struct riscv_debug_reg_ctx_t context = {
* const struct struct riscv_debug_reg_ctx context = {
* .abits = { .value = <abits value>, .is_set = true }
* };
* char buf[riscv_debug_reg_to_s(NULL, DTM_DMI_ORDINAL, context, <dmi value>) + 1]
* riscv_debug_reg_to_s(buf, DTM_DMI_ORDINAL, context, <dmi value>);
*/
unsigned int riscv_debug_reg_to_s(char *buf, enum riscv_debug_reg_ordinal reg_ordinal,
riscv_debug_reg_ctx_t context, uint64_t value,
struct riscv_debug_reg_ctx context, uint64_t value,
enum riscv_debug_reg_show show);
#endif /* OPENOCD_TARGET_RISCV_DEBUG_REG_PRINTER_H */