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in_handler in_check_mask and in_check_value now removed from field. Last big patch in the series of JTAG API cleanup.

Browse Source 
git-svn-id: svn://svn.berlios.de/openocd/trunk@1672 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
2009-05-08 09:48:00 +00:00
parent 4df87471ca
commit 57bc9f37c9
24 changed files with 155 additions and 289 deletions
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5
src/target/arm11_dbgtap.c
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@@ -87,11 +87,6 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
{
field->tap = arm11->jtag_info.tap;
field->num_bits = num_bits;
field->in_check_mask = NULL;
field->in_check_value = NULL;
field->in_handler = NULL;
field->in_handler_priv = NULL;
field->out_value = out_data;
field->in_value = in_data;
}

4
src/target/arm720t.c
View File

@@ -113,13 +113,13 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
fields[0].num_bits = 1;
fields[0].out_value = &instruction_buf;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = out_buf;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
if (in)
{
u8 tmp[4];

12
src/target/arm7tdmi.c
View File

@@ -115,13 +115,13 @@ int arm7tdmi_examine_debug_reason(target_t *target)
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = &breakpoint;
fields[0].in_handler = NULL;
fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = databus;
fields[1].in_handler = NULL;
if((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
{
@@ -194,7 +194,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -202,7 +202,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[1].out_value = NULL;
u8 tmp[4];
fields[1].in_value = tmp;
fields[1].in_handler = NULL;
jtag_add_dr_scan_now(2, fields, TAP_INVALID);
@@ -286,14 +286,14 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
u8 tmp[4];
fields[1].in_value = tmp;
fields[1].in_handler = NULL;
jtag_add_dr_scan_now(2, fields, TAP_INVALID);

24
src/target/arm920t.c
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@@ -114,25 +114,25 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 6;
fields[2].out_value = &reg_addr_buf;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
fields[3].in_handler = NULL;
jtag_add_dr_scan(4, fields, TAP_INVALID);
@@ -175,7 +175,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -185,7 +185,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -195,7 +195,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
fields[3].tap = jtag_info->tap;
@@ -205,7 +205,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[3].in_value = NULL;
fields[3].in_handler = NULL;
jtag_add_dr_scan(4, fields, TAP_INVALID);
@@ -242,7 +242,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -252,7 +252,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -262,7 +262,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
fields[3].tap = jtag_info->tap;
@@ -272,7 +272,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[3].in_value = NULL;
fields[3].in_handler = NULL;
jtag_add_dr_scan(4, fields, TAP_INVALID);

21
src/target/arm926ejs.c
View File

@@ -96,6 +96,10 @@ target_type_t arm926ejs_target =
int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
{
/* FIX!!!! this code should be reenabled. For now it does not check
* the queue...*/
return 0;
#if 0
/* The ARM926EJ-S' instruction register is 4 bits wide */
u8 t = *captured & 0xf;
u8 t2 = *field->in_check_value & 0xf;
@@ -109,6 +113,7 @@ int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
return ERROR_OK;
}
return ERROR_JTAG_QUEUE_FAILED;;
#endif
}
#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
@@ -139,26 +144,26 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 1;
fields[1].out_value = &access;
fields[1].in_value = &access;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 14;
fields[2].out_value = address_buf;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
fields[3].in_handler = NULL;
jtag_add_dr_scan(4, fields, TAP_INVALID);
@@ -217,7 +222,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -227,7 +232,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[1].in_value = &access;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -237,7 +242,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
fields[3].tap = jtag_info->tap;
@@ -247,7 +252,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[3].in_value = NULL;
fields[3].in_handler = NULL;
jtag_add_dr_scan(4, fields, TAP_INVALID);

12
src/target/arm966e.c
View File

@@ -188,19 +188,19 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = &reg_addr_buf;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -250,7 +250,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -260,7 +260,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -270,7 +270,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);

24
src/target/arm9tdmi.c
View File

@@ -132,7 +132,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
fields[0].in_value = databus;
fields[0].in_handler = NULL;
fields[1].tap = arm7_9->jtag_info.tap;
@@ -142,7 +142,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
fields[1].in_value = &debug_reason;
fields[1].in_handler = NULL;
fields[2].tap = arm7_9->jtag_info.tap;
@@ -152,7 +152,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
fields[2].in_value = instructionbus;
fields[2].in_handler = NULL;
if((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
@@ -217,20 +217,20 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = &sysspeed_buf;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = instr_buf;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
if (in)
{
@@ -285,19 +285,19 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan_now(3, fields, TAP_INVALID);
@@ -350,19 +350,19 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan_now(3, fields, TAP_INVALID);

8
src/target/arm_adi_v5.c
View File

@@ -81,7 +81,7 @@ int adi_jtag_dp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *o
fields[0].in_value = ack;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -89,7 +89,7 @@ int adi_jtag_dp_scan(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u8 *o
fields[1].out_value = outvalue;
fields[1].in_value = invalue;
fields[1].in_handler = NULL;
@@ -114,7 +114,7 @@ int adi_jtag_dp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u
buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
fields[0].out_value = &out_addr_buf;
fields[0].in_value = ack;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -122,7 +122,7 @@ int adi_jtag_dp_scan_u32(arm_jtag_t *jtag_info, u8 instr, u8 reg_addr, u8 RnW, u
buf_set_u32(out_value_buf, 0, 32, outvalue);
fields[1].out_value = out_value_buf;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
if (invalue)
{

2
src/target/arm_jtag.c
View File

@@ -53,7 +53,7 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, void *no_verify_ca
field.out_value = t;
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
field.in_handler = NULL;
if (no_verify_capture==NULL)

54
src/target/avrt.c
View File

@@ -126,10 +126,10 @@ int avr_register_commands(struct command_context_s *cmd_ctx)
int avr_target_create(struct target_s *target, Jim_Interp *interp)
{
avr_common_t *avr = calloc(1, sizeof(avr_common_t));
avr->jtag_info.tap = target->tap;
target->arch_info = avr;
return ERROR_OK;
}
@@ -157,7 +157,7 @@ int avr_poll(target_t *target)
{
target->state = TARGET_HALTED;
}
LOG_DEBUG("%s", __FUNCTION__);
return ERROR_OK;
}
@@ -183,7 +183,7 @@ int avr_step(struct target_s *target, int current, u32 address, int handle_break
int avr_assert_reset(target_t *target)
{
target->state = TARGET_RESET;
LOG_DEBUG("%s", __FUNCTION__);
return ERROR_OK;
}
@@ -191,7 +191,7 @@ int avr_assert_reset(target_t *target)
int avr_deassert_reset(target_t *target)
{
target->state = TARGET_RUNNING;
LOG_DEBUG("%s", __FUNCTION__);
return ERROR_OK;
}
@@ -225,21 +225,17 @@ int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti)
LOG_ERROR("invalid ir_len");
return ERROR_FAIL;
}
{
scan_field_t field[1];
field[0].tap = tap;
field[0].num_bits = tap->ir_length;
field[0].out_value = ir_out;
field[0].in_value = ir_in;
field[0].in_check_value = NULL;
field[0].in_check_mask = NULL;
field[0].in_handler = NULL;
field[0].in_handler_priv = NULL;
jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
}
return ERROR_OK;
}
@@ -250,21 +246,17 @@ int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti)
LOG_ERROR("invalid tap");
return ERROR_FAIL;
}
{
scan_field_t field[1];
field[0].tap = tap;
field[0].num_bits = dr_len;
field[0].out_value = dr_out;
field[0].in_value = dr_in;
field[0].in_check_value = NULL;
field[0].in_check_mask = NULL;
field[0].in_handler = NULL;
field[0].in_handler_priv = NULL;
jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE);
}
return ERROR_OK;
}
@@ -275,9 +267,9 @@ int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti)
LOG_ERROR("ir_len overflow, maxium is 8");
return ERROR_FAIL;
}
mcu_write_ir(tap, ir_in, &ir_out, ir_len, rti);
return ERROR_OK;
}
@@ -288,9 +280,9 @@ int mcu_write_dr_u8(jtag_tap_t *tap, u8 *dr_in, u8 dr_out, int dr_len, int rti)
LOG_ERROR("dr_len overflow, maxium is 8");
return ERROR_FAIL;
}
mcu_write_dr(tap, dr_in, &dr_out, dr_len, rti);
return ERROR_OK;
}
@@ -301,9 +293,9 @@ int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rt
LOG_ERROR("ir_len overflow, maxium is 16");
return ERROR_FAIL;
}
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);
return ERROR_OK;
}
@@ -314,9 +306,9 @@ int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rt
LOG_ERROR("dr_len overflow, maxium is 16");
return ERROR_FAIL;
}
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);
return ERROR_OK;
}
@@ -327,9 +319,9 @@ int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rt
LOG_ERROR("ir_len overflow, maxium is 32");
return ERROR_FAIL;
}
mcu_write_ir(tap, (u8*)ir_in, (u8*)&ir_out, ir_len, rti);
return ERROR_OK;
}
@@ -340,9 +332,9 @@ int mcu_write_dr_u32(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int dr_len, int rt
LOG_ERROR("dr_len overflow, maxium is 32");
return ERROR_FAIL;
}
mcu_write_dr(tap, (u8*)dr_in, (u8*)&dr_out, dr_len, rti);
return ERROR_OK;
}

24
src/target/embeddedice.c
View File

@@ -252,21 +252,21 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = ice_reg->jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = ice_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -304,21 +304,21 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_DATA]);
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -412,7 +412,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -423,7 +423,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -434,7 +434,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
while (size > 0)
@@ -481,7 +481,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
fields[0].in_value = field0_in;
fields[0].in_handler = NULL;
fields[1].tap = jtag_info->tap;
@@ -492,7 +492,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -503,7 +503,7 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);

22
src/target/etb.c
View File

@@ -74,7 +74,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr)
field.in_value = NULL;
field.in_handler = NULL;
jtag_add_ir_scan(1, &field, TAP_INVALID);
@@ -99,7 +99,7 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain)
field.in_value = NULL;
field.in_handler = NULL;
/* select INTEST instruction */
@@ -188,21 +188,21 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
fields[0].out_value = NULL;
u8 tmp[4];
fields[0].in_value = tmp;
fields[0].in_handler = NULL;
fields[1].tap = etb->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, 4);
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = etb->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -250,7 +250,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = etb_reg->etb->tap;
@@ -261,7 +261,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = etb_reg->etb->tap;
@@ -272,7 +272,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -347,7 +347,7 @@ int etb_write_reg(reg_t *reg, u32 value)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = etb_reg->etb->tap;
@@ -358,7 +358,7 @@ int etb_write_reg(reg_t *reg, u32 value)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = etb_reg->etb->tap;
@@ -369,7 +369,7 @@ int etb_write_reg(reg_t *reg, u32 value)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);

12
src/target/etm.c
View File

@@ -340,21 +340,21 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = etm_reg->jtag_info->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = etm_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -424,7 +424,7 @@ int etm_write_reg(reg_t *reg, u32 value)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = etm_reg->jtag_info->tap;
@@ -435,7 +435,7 @@ int etm_write_reg(reg_t *reg, u32 value)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = etm_reg->jtag_info->tap;
@@ -446,7 +446,7 @@ int etm_write_reg(reg_t *reg, u32 value)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);

6
src/target/feroceon.c
View File

@@ -137,7 +137,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
fields[0].out_value = out_buf;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
@@ -149,7 +149,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = jtag_info->tap;
@@ -159,7 +159,7 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);

8
src/target/mips_ejtag.c
View File

@@ -53,7 +53,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m
field.in_value = NULL;
field.in_handler = NULL;
jtag_add_ir_scan(1, &field, TAP_INVALID);
}
@@ -76,7 +76,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t ha
field.in_value = (void*)idcode;
field.in_handler = NULL;
jtag_add_dr_scan(1, &field, TAP_INVALID);
@@ -103,7 +103,7 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t
field.in_value = (void*)impcode;
field.in_handler = NULL;
jtag_add_dr_scan(1, &field, TAP_INVALID);
@@ -134,7 +134,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
field.in_value = (u8*)data;
field.in_handler = NULL;
jtag_add_dr_scan(1, &field, TAP_INVALID);

18
src/target/xscale.c
View File

@@ -270,7 +270,7 @@ int xscale_read_dcsr(target_t *target)
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
fields[1].in_handler = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
@@ -346,7 +346,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
fields[1].out_value = NULL;
u8 tmp[4];
fields[1].in_value = tmp;
fields[1].in_handler = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
@@ -462,7 +462,7 @@ int xscale_read_tx(target_t *target, int consume)
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_TX].value;
fields[1].in_handler = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
@@ -554,7 +554,7 @@ int xscale_write_rx(target_t *target)
fields[1].num_bits = 32;
fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_RX].value;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
@@ -726,7 +726,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
fields[1].num_bits = 32;
fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = xscale->jtag_info.tap;
fields[2].num_bits = 1;
@@ -796,7 +796,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = xscale->jtag_info.tap;
@@ -806,7 +806,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
jtag_add_dr_scan(2, fields, TAP_INVALID);
@@ -858,7 +858,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = xscale->jtag_info.tap;
@@ -868,7 +868,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
jtag_add_dr_scan(2, fields, TAP_INVALID);