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aarch64: fix software breakpoints when in aarch32 state

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Use the correct opcode for Aarch32 state, both for the breakpoint
instruction itself and the cache handling functions.

Change-Id: I975fa67b1e577b54f5c672a01d516419c6a614b2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3981
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Matthias Welwarsky
2016-10-26 17:32:43 +02:00
committed by Paul Fertser
parent 7c85165bc1
commit 5d00fd9d1d
5 changed files with 31 additions and 6 deletions
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11
src/target/armv8_dpm.c
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@@ -336,6 +336,9 @@ static int dpmv8_instr_write_data_r0_64(struct arm_dpm *dpm,
struct armv8_common *armv8 = dpm->arm->arch_info;
int retval;
if (dpm->arm->core_state != ARM_STATE_AARCH64)
return dpmv8_instr_write_data_r0(dpm, opcode, data);
/* transfer data from DCC to R0 */
retval = dpmv8_write_dcc_64(armv8, data);
if (retval == ERROR_OK)
@@ -413,6 +416,14 @@ static int dpmv8_instr_read_data_r0_64(struct arm_dpm *dpm,
struct armv8_common *armv8 = dpm->arm->arch_info;
int retval;
if (dpm->arm->core_state != ARM_STATE_AARCH64) {
uint32_t tmp;
retval = dpmv8_instr_read_data_r0(dpm, opcode, &tmp);
if (retval == ERROR_OK)
*data = tmp;
return retval;
}
/* the opcode, writing data to R0 */
retval = dpmv8_exec_opcode(dpm, opcode, &dpm->dscr);
if (retval != ERROR_OK)