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tcl: stm32mp13x: modify handshake to open debug port

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Align the target script to the handshake implemented in the latest
version of stm32wrapper4dbg to get access to the debug port.

Change-Id: Ia1c7773330fda776abb4385331fddbf431d11c39
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8983
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2025-07-04 16:29:47 +02:00
parent 9bb6fa67ca
commit 5d3f53363b
1 changed files with 45 additions and 13 deletions
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58
tcl/target/st/stm32mp13x.cfg
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@@ -46,7 +46,7 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap -ignore-syspwrupack
# NOTE: do not change the order of target create
target create $_CHIPNAME.ap1 mem_ap -dap $_CHIPNAME.dap -ap-num 1
target create $_CHIPNAME.axi mem_ap -dap $_CHIPNAME.dap -ap-num 0
target create $_CHIPNAME.cpu cortex_a -dap $_CHIPNAME.dap -ap-num 1 -coreid 0 -dbgbase 0xE00D0000
target create $_CHIPNAME.cpu cortex_a -dap $_CHIPNAME.dap -ap-num 1 -coreid 0 -dbgbase 0xE00D0000 -defer-examine
$_CHIPNAME.cpu cortex_a maskisr on
$_CHIPNAME.cpu cortex_a dacrfixup on
@@ -76,27 +76,59 @@ proc axi_nsecure {} {
axi_secure
proc dbgmcu_enable_debug {} {
# mmw with target selection
proc target_mmw {target reg setbits clearbits} {
set val [eval $target read_memory $reg 32 1]
set val [expr {($val & ~$clearbits) | $setbits}]
eval $target mww $reg $val
}
lappend _telnet_autocomplete_skip _enable_debug
# Uses AP1
proc _enable_debug {} {
# keep clock enabled in low-power
## catch {$::_CHIPNAME.ap1 mww 0xe0081004 0x00000004}
catch {$::_CHIPNAME.ap1 mww 0xe0081004 0x00000004}
# freeze watchdog 1 and 2 on core halted
catch {$::_CHIPNAME.ap1 mww 0xe008102c 0x00000004}
catch {$::_CHIPNAME.ap1 mww 0xe008104c 0x00000008}
}
proc toggle_cpu_dbg_claim0 {} {
# toggle CPU0 DBG_CLAIM[0]
$::_CHIPNAME.ap1 mww 0xe00d0fa0 1
$::_CHIPNAME.ap1 mww 0xe00d0fa4 1
lappend _telnet_autocomplete_skip _handshake_with_wrapper
# Uses AP1
proc _handshake_with_wrapper { halt } {
set dbgmcu_cr 0
catch {set dbgmcu_cr [eval $::_CHIPNAME.ap1 read_memory 0xe0081004 32 1]}
if {[expr {($dbgmcu_cr & 0x07) == 0x00}]} {
echo "\nWARNING: FSBL wrapper not detected. Board in dev boot mode?\n"
return
}
if { $halt } {
$::_CHIPNAME.ap1 arp_halt
$::_CHIPNAME.ap1 mww 0xe00d0300 0
target_mmw $::_CHIPNAME.ap1 0xe00d0088 0x00004000 0
}
$::_CHIPNAME.ap1 mww 0xe0081004 0x7
}
# FIXME: most of handlers below will be removed once reset framework get merged
$_CHIPNAME.ap1 configure -event reset-assert-post {
adapter assert srst
}
$_CHIPNAME.ap1 configure -event reset-deassert-pre {
adapter deassert srst deassert trst
catch {dap init}
catch {$::_CHIPNAME.dap apid 1}
$::_CHIPNAME.ap1 arp_examine
_handshake_with_wrapper $halt
_enable_debug
$::_CHIPNAME.cpu arp_examine
if { $halt } {
$::_CHIPNAME.cpu arp_halt
}
}
$_CHIPNAME.ap1 configure -event examine-end {
_enable_debug
$::_CHIPNAME.cpu arp_examine
}
$_CHIPNAME.cpu configure -event reset-deassert-pre {$::_CHIPNAME.cpu arp_examine}
$_CHIPNAME.cpu configure -event reset-deassert-post {toggle_cpu_dbg_claim0; dbgmcu_enable_debug}
$_CHIPNAME.ap1 configure -event examine-start {dap init}
$_CHIPNAME.ap1 configure -event examine-end {dbgmcu_enable_debug}