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David Brownell <david-b@pacbell.net>

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Provide an "armv7a disassemble" command.  Current omissions include
VFP (except as coprocessor instructions), Neon, and various Thumb2
opcodes that are not available in ARMv7-M processors.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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oharboe
2009-09-08 06:18:45 +00:00
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doc/openocd.texi
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@@ -5105,6 +5105,23 @@ Displays the number of extra tck for mem-ap memory bus access [0-255].
If @var{value} is defined, first assigns that.
@end deffn
@subsection ARMv7-A specific commands
@cindex ARMv7-A
@deffn Command {armv7a disassemble} address [count [@option{thumb}]]
@cindex disassemble
Disassembles @var{count} instructions starting at @var{address}.
If @var{count} is not specified, a single instruction is disassembled.
If @option{thumb} is specified, or the low bit of the address is set,
Thumb2 (mixed 16/32-bit) instructions are used;
else ARM (32-bit) instructions are used.
With a handful of exceptions, ThumbEE instructions are the same as Thumb2;
ThumbEE disassembly currently has no explicit support.
(Processors may also support the Jazelle state, but
those instructions are not currently understood by OpenOCD.)
@end deffn
@subsection Cortex-M3 specific commands
@cindex Cortex-M3