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cortex_m: support control.FPCA

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Bit 2 of control register is used if the processor includes the FP
extension

Change-Id: Ie21bc9de8cae5bad9d841e1908eff3aa0bb29d4b
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
Reviewed-on: http://openocd.zylin.com/5853
Reviewed-by: Sylvain Chouleur <sylvain.chouleur@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Sylvain Chouleur
2020-10-12 17:24:05 +02:00
committed by Tomas Vanek
parent 4fc61a2f9d
commit 5e61d59c90
3 changed files with 7 additions and 7 deletions
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6
src/target/cortex_m.c
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@@ -541,7 +541,7 @@ static int cortex_m_debug_entry(struct target *target)
arm->map = armv7m_msp_reg_map;
} else {
unsigned control = buf_get_u32(arm->core_cache
->reg_list[ARMV7M_CONTROL].value, 0, 2);
->reg_list[ARMV7M_CONTROL].value, 0, 3);
/* is this thread privileged? */
arm->core_mode = control & 1
@@ -1678,7 +1678,7 @@ static int cortex_m_load_core_reg_u32(struct target *target,
break;
case ARMV7M_CONTROL:
*value = buf_get_u32((uint8_t *)value, 24, 2);
*value = buf_get_u32((uint8_t *)value, 24, 3);
break;
}
@@ -1764,7 +1764,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
break;
case ARMV7M_CONTROL:
buf_set_u32((uint8_t *)&reg, 24, 2, value);
buf_set_u32((uint8_t *)&reg, 24, 3, value);
break;
}