michal smulski <michal.smulski@ooma.com> reset now works
git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@@ -1,33 +1,34 @@
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source [find target/c100.cfg]
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source [find c100.cfg]
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# basic register defintion for C100
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source [find target/c100regs.tcl]
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source [find c100regs.tcl]
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# board-config info
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source [find target/c100config.tcl]
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source [find c100config.tcl]
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# C100 helper functions
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source [find target/c100helper.tcl]
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source [find c100helper.tcl]
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# Telo board & C100 support trst and srst
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# however openocd does not support
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# 1. setting srst reset pulse width
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# 2. setting delay between srst pulse and JTAG access
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# This really makes the srst useless for now.
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# Note that libftd2xx.so tries to assert srst
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# which break this script
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# use libftdi.so library instead with this script
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# make the reset asserted to
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# allow RC circuit to discharge for: [ms]
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jtag_nsrst_assert_width 100
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jtag_ntrst_assert_width 100
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# don't talk to JTAG after reset for: [ms]
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst separate
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# issue telnet: reset init
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# issue gdb: monitor reset init
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$_TARGETNAME configure -event reset-init {
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jtag_khz 100
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# setup GPIO used as control signals for C100
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setupGPIO
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# This will allow acces to lower 8MB or NOR
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lowGPIO5
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# setup NOR size,timing,etc.
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setupNOR
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# setup internals + PLL + DDR2
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initC100
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# this will setup Telo board
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setupTelo
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#turn up the JTAG speed
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jtag_khz 3000
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puts "JTAG speek now 3MHz"
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@@ -38,10 +39,15 @@ $_TARGETNAME configure -event reset-deassert-post {
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# Force target into ARM state.
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# soft_reset_halt # not implemented on ARM11
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puts "Detected SRSRT asserted on C100.CPU"
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}
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proc power_restore {} { puts "Sensed power restore. No action." }
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$_TARGETNAME configure -event reset-assert-post {
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puts "Assering reset"
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#sleep 10
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}
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proc power_restore {} { puts "Sensed power restore. No action." }
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proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
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