ARM: core DPM support for watchpoints
This is a NOP unless the underlying core exposes two new methods, and neither of the two cores using this (ARM11xx, Cortex-A8) do so yet. This patch only updates those cores so they pass a flag saying whether or not to update breakpoint and watchpoint status before resuming; and removing some now-needless anti-segfault code from ARM11. Cortex-A8 didn't have that code ... yes, it segfaulted when setting watchpoints. NOTE: this uses a slightly different strategy for setting/clearing breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone unless it's *got* to change something, to speed halt/resume cycles (including single stepping). ALSO NOTE: this under-delivers for Cortex-A8, where regions with size up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can also handle (size 1/2/4 bytes). Should get fixed later. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@@ -41,7 +41,7 @@
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static int cortex_a8_poll(struct target *target);
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static int cortex_a8_debug_entry(struct target *target);
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static int cortex_a8_restore_context(struct target *target);
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static int cortex_a8_restore_context(struct target *target, bool bpwp);
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static int cortex_a8_set_breakpoint(struct target *target,
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struct breakpoint *breakpoint, uint8_t matchmode);
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static int cortex_a8_unset_breakpoint(struct target *target,
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@@ -602,11 +602,7 @@ static int cortex_a8_resume(struct target *target, int current,
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dap_ap_select(swjdp, swjdp_debugap);
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if (!debug_execution)
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{
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target_free_all_working_areas(target);
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// cortex_m3_enable_breakpoints(target);
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// cortex_m3_enable_watchpoints(target);
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}
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#if 0
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if (debug_execution)
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@@ -661,7 +657,7 @@ static int cortex_a8_resume(struct target *target, int current,
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armv4_5->core_cache->reg_list[15].dirty = 1;
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armv4_5->core_cache->reg_list[15].valid = 1;
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cortex_a8_restore_context(target);
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cortex_a8_restore_context(target, handle_breakpoints);
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#if 0
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/* the front-end may request us not to handle breakpoints */
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@@ -952,7 +948,7 @@ static int cortex_a8_step(struct target *target, int current, uint32_t address,
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return ERROR_OK;
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}
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static int cortex_a8_restore_context(struct target *target)
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static int cortex_a8_restore_context(struct target *target, bool bpwp)
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{
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struct armv7a_common *armv7a = target_to_armv7a(target);
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@@ -961,7 +957,7 @@ static int cortex_a8_restore_context(struct target *target)
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if (armv7a->pre_restore_context)
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armv7a->pre_restore_context(target);
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arm_dpm_write_dirty_registers(&armv7a->dpm);
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arm_dpm_write_dirty_registers(&armv7a->dpm, bpwp);
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if (armv7a->post_restore_context)
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armv7a->post_restore_context(target);
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