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armv7a: access monitor registers only with security extensions

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Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.

Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.

Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2019-06-24 18:28:31 +02:00
parent 9626402c5a
commit 6900c5af4e
2 changed files with 14 additions and 2 deletions
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3
src/target/armv7a.h
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@@ -178,6 +178,9 @@ static inline bool is_armv7a(struct armv7a_common *armv7a)
/* See ARMv7a arch spec section C10.8 */
#define CPUDBG_AUTHSTATUS 0xFB8
/* See ARMv7a arch spec DDI 0406C C11.10 */
#define CPUDBG_ID_PFR1 0xD24
/* Masks for Vector Catch register */
#define DBG_VCR_FIQ_MASK ((1 << 31) | (1 << 7))
#define DBG_VCR_IRQ_MASK ((1 << 30) | (1 << 6))