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helper/command: change prototype of command_print/command_print_sameline

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To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.

Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
	sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
	's/\(command_print(cmd\)->ctx,/\1,/'
	's/\(command_print(CMD\)_CTX,/\1,/'
	's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
	's/\(command_print_sameline(cmd\)->ctx,/\1,/'
	's/\(command_print_sameline(CMD\)_CTX,/\1,/'
	's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'

This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.

Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Antonio Borneo
2019-04-03 10:37:24 +02:00
committed by Tomas Vanek
parent 6916550938
commit 6cb5ba6f11
105 changed files with 963 additions and 963 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/target/aarch64.c
View File

@@ -2572,7 +2572,7 @@ COMMAND_HANDLER(aarch64_mask_interrupts_command)
}
n = Jim_Nvp_value2name_simple(nvp_maskisr_modes, aarch64->isrmasking_mode);
command_print(CMD_CTX, "aarch64 interrupt mask %s", n->name);
command_print(CMD, "aarch64 interrupt mask %s", n->name);
return ERROR_OK;
}

12
src/target/arm720t.c
View File

@@ -237,7 +237,7 @@ static int arm720t_verify_pointer(struct command_invocation *cmd,
struct arm720t_common *arm720t)
{
if (arm720t->common_magic != ARM720T_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not an ARM720");
command_print(cmd, "target is not an ARM720");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -447,7 +447,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -460,7 +460,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
uint32_t value;
retval = arm720t_read_cp15(target, opcode, &value);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
command_print(CMD, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
return ERROR_OK;
}
@@ -468,17 +468,17 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
command_print(CMD, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
retval = arm720t_write_cp15(target, opcode, value);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
command_print(CMD, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
return ERROR_OK;
}
command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
command_print(CMD, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
}
}

12
src/target/arm7_9_common.c
View File

@@ -2747,14 +2747,14 @@ COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
if (!is_arm7_9(arm7_9)) {
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
command_print(CMD, "current target isn't an ARM7/ARM9 target");
return ERROR_TARGET_INVALID;
}
if (CMD_ARGC > 0)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], arm7_9->use_dbgrq);
command_print(CMD_CTX,
command_print(CMD,
"use of EmbeddedICE dbgrq instead of breakpoint for target halt %s",
(arm7_9->use_dbgrq) ? "enabled" : "disabled");
@@ -2767,14 +2767,14 @@ COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
if (!is_arm7_9(arm7_9)) {
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
command_print(CMD, "current target isn't an ARM7/ARM9 target");
return ERROR_TARGET_INVALID;
}
if (CMD_ARGC > 0)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], arm7_9->fast_memory_access);
command_print(CMD_CTX,
command_print(CMD,
"fast memory access is %s",
(arm7_9->fast_memory_access) ? "enabled" : "disabled");
@@ -2787,14 +2787,14 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
if (!is_arm7_9(arm7_9)) {
command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
command_print(CMD, "current target isn't an ARM7/ARM9 target");
return ERROR_TARGET_INVALID;
}
if (CMD_ARGC > 0)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], arm7_9->dcc_downloads);
command_print(CMD_CTX,
command_print(CMD,
"dcc downloads are %s",
(arm7_9->dcc_downloads) ? "enabled" : "disabled");

30
src/target/arm920t.c
View File

@@ -511,7 +511,7 @@ static int arm920t_verify_pointer(struct command_invocation *cmd,
struct arm920t_common *arm920t)
{
if (arm920t->common_magic != ARM920T_COMMON_MAGIC) {
command_print(cmd->ctx, arm920_not);
command_print(cmd, arm920_not);
return ERROR_TARGET_INVALID;
}
@@ -1103,7 +1103,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
/* restore CP15 MMU and Cache settings */
arm920t_write_cp15_physical(target, CP15PHYS_CTRL, cp15_ctrl_saved);
command_print(CMD_CTX, "cache content successfully output to %s",
command_print(CMD, "cache content successfully output to %s",
CMD_ARGV[0]);
fclose(output);
@@ -1415,7 +1415,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
(i_tlb[i].cam & 0x20) ? "(valid)" : "(invalid)");
}
command_print(CMD_CTX, "mmu content successfully output to %s",
command_print(CMD, "mmu content successfully output to %s",
CMD_ARGV[0]);
fclose(output);
@@ -1456,7 +1456,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for "
command_print(CMD, "target must be stopped for "
"\"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -1472,7 +1472,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
uint32_t value;
retval = arm920t_read_cp15_physical(target, address, &value);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %i", address);
return ERROR_OK;
}
@@ -1480,7 +1480,7 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "%i: %8.8" PRIx32,
command_print(CMD, "%i: %8.8" PRIx32,
address, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
@@ -1488,12 +1488,12 @@ COMMAND_HANDLER(arm920t_handle_cp15_command)
retval = arm920t_write_cp15_physical(target,
address, value);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %i", address);
/* REVISIT why lie? "return retval"? */
return ERROR_OK;
}
command_print(CMD_CTX, "%i: %8.8" PRIx32,
command_print(CMD, "%i: %8.8" PRIx32,
address, value);
}
}
@@ -1513,7 +1513,7 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for "
command_print(CMD, "target must be stopped for "
"\"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -1530,14 +1530,14 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
retval = arm920t_read_cp15_interpreted(target,
opcode, 0x0, &value);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't execute %8.8" PRIx32,
opcode);
/* REVISIT why lie? "return retval"? */
return ERROR_OK;
}
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32,
command_print(CMD, "%8.8" PRIx32 ": %8.8" PRIx32,
opcode, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
@@ -1545,13 +1545,13 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
retval = arm920t_write_cp15_interpreted(target,
opcode, value, 0);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't execute %8.8" PRIx32,
opcode);
/* REVISIT why lie? "return retval"? */
return ERROR_OK;
}
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32,
command_print(CMD, "%8.8" PRIx32 ": %8.8" PRIx32,
opcode, value);
} else if (CMD_ARGC == 3) {
uint32_t value;
@@ -1561,12 +1561,12 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command)
retval = arm920t_write_cp15_interpreted(target,
opcode, value, address);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't execute %8.8" PRIx32, opcode);
/* REVISIT why lie? "return retval"? */
return ERROR_OK;
}
command_print(CMD_CTX, "%8.8" PRIx32 ": %8.8" PRIx32
command_print(CMD, "%8.8" PRIx32 ": %8.8" PRIx32
" %8.8" PRIx32, opcode, value, address);
}
} else

2
src/target/arm926ejs.c
View File

@@ -505,7 +505,7 @@ static int arm926ejs_verify_pointer(struct command_invocation *cmd,
struct arm926ejs_common *arm926)
{
if (arm926->common_magic != ARM926EJS_COMMON_MAGIC) {
command_print(cmd->ctx, arm926_not);
command_print(cmd, arm926_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;

18
src/target/arm946e.c
View File

@@ -103,7 +103,7 @@ static int arm946e_verify_pointer(struct command_invocation *cmd,
struct arm946e_common *arm946e)
{
if (arm946e->common_magic != ARM946E_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not an ARM946");
command_print(cmd, "target is not an ARM946");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -563,7 +563,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_TARGET_NOT_HALTED;
}
@@ -574,7 +574,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
uint32_t value;
retval = arm946e_read_cp15(target, address, &value);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
return retval;
}
retval = jtag_execute_queue();
@@ -582,14 +582,14 @@ COMMAND_HANDLER(arm946e_handle_cp15)
return retval;
/* Return value in hex format */
command_print(CMD_CTX, "0x%08" PRIx32, value);
command_print(CMD, "0x%08" PRIx32, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
retval = arm946e_write_cp15(target, address, value);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
return retval;
}
if (address == CP15_CTL)
@@ -613,7 +613,7 @@ COMMAND_HANDLER(arm946e_handle_idcache)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_TARGET_NOT_HALTED;
}
@@ -623,9 +623,9 @@ COMMAND_HANDLER(arm946e_handle_idcache)
bool bena = ((arm946e->cp15_control_reg & (icache ? CP15_CTL_ICACHE : CP15_CTL_DCACHE)) != 0)
&& (arm946e->cp15_control_reg & 0x1);
if (csize == 0)
command_print(CMD_CTX, "%s-cache absent", icache ? "I" : "D");
command_print(CMD, "%s-cache absent", icache ? "I" : "D");
else
command_print(CMD_CTX, "%s-cache size: %" PRIu32 "K, %s",
command_print(CMD, "%s-cache size: %" PRIu32 "K, %s",
icache ? "I" : "D", csize, bena ? "enabled" : "disabled");
return ERROR_OK;
}
@@ -643,7 +643,7 @@ COMMAND_HANDLER(arm946e_handle_idcache)
/* Do not invalidate or change state, if cache is absent */
if (csize == 0) {
command_print(CMD_CTX, "%s-cache absent, '%s' operation undefined", icache ? "I" : "D", CMD_ARGV[0]);
command_print(CMD, "%s-cache absent, '%s' operation undefined", icache ? "I" : "D", CMD_ARGV[0]);
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}

12
src/target/arm966e.c
View File

@@ -60,7 +60,7 @@ static int arm966e_verify_pointer(struct command_invocation *cmd,
struct arm966e_common *arm966e)
{
if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not an ARM966");
command_print(cmd, "target is not an ARM966");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -175,7 +175,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -188,7 +188,7 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
uint32_t value;
retval = arm966e_read_cp15(target, address, &value);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %" PRIi32,
address);
return ERROR_OK;
@@ -197,19 +197,19 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "%" PRIi32 ": %8.8" PRIx32,
address, value);
} else if (CMD_ARGC == 2) {
uint32_t value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
retval = arm966e_write_cp15(target, address, value);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %" PRIi32,
address);
return ERROR_OK;
}
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "%" PRIi32 ": %8.8" PRIx32,
address, value);
}
}

6
src/target/arm9tdmi.c
View File

@@ -801,7 +801,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
/* it's uncommon, but some ARM7 chips can support this */
if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC
|| !arm7_9->has_vector_catch) {
command_print(CMD_CTX, "target doesn't have EmbeddedICE "
command_print(CMD, "target doesn't have EmbeddedICE "
"with vector_catch");
return ERROR_TARGET_INVALID;
}
@@ -834,7 +834,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
/* complain if vector wasn't found */
if (!arm9tdmi_vectors[j].name) {
command_print(CMD_CTX, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]);
command_print(CMD, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]);
/* reread current setting */
vector_catch_value = buf_get_u32(
@@ -852,7 +852,7 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
/* output current settings */
for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) {
command_print(CMD_CTX, "%s: %s", arm9tdmi_vectors[i].name,
command_print(CMD, "%s: %s", arm9tdmi_vectors[i].name,
(vector_catch_value & arm9tdmi_vectors[i].value)
? "catch" : "don't catch");
}

70
src/target/arm_adi_v5.c
View File

@@ -1199,7 +1199,7 @@ static int dap_rom_display(struct command_invocation *cmd,
char tabs[16] = "";
if (depth > 16) {
command_print(cmd->ctx, "\tTables too deep");
command_print(cmd, "\tTables too deep");
return ERROR_FAIL;
}
@@ -1207,25 +1207,25 @@ static int dap_rom_display(struct command_invocation *cmd,
snprintf(tabs, sizeof(tabs), "[L%02d] ", depth);
uint32_t base_addr = dbgbase & 0xFFFFF000;
command_print(cmd->ctx, "\t\tComponent base address 0x%08" PRIx32, base_addr);
command_print(cmd, "\t\tComponent base address 0x%08" PRIx32, base_addr);
retval = dap_read_part_id(ap, base_addr, &cid, &pid);
if (retval != ERROR_OK) {
command_print(cmd->ctx, "\t\tCan't read component, the corresponding core might be turned off");
command_print(cmd, "\t\tCan't read component, the corresponding core might be turned off");
return ERROR_OK; /* Don't abort recursion */
}
if (!is_dap_cid_ok(cid)) {
command_print(cmd->ctx, "\t\tInvalid CID 0x%08" PRIx32, cid);
command_print(cmd, "\t\tInvalid CID 0x%08" PRIx32, cid);
return ERROR_OK; /* Don't abort recursion */
}
/* component may take multiple 4K pages */
uint32_t size = (pid >> 36) & 0xf;
if (size > 0)
command_print(cmd->ctx, "\t\tStart address 0x%08" PRIx32, (uint32_t)(base_addr - 0x1000 * size));
command_print(cmd, "\t\tStart address 0x%08" PRIx32, (uint32_t)(base_addr - 0x1000 * size));
command_print(cmd->ctx, "\t\tPeripheral ID 0x%010" PRIx64, pid);
command_print(cmd, "\t\tPeripheral ID 0x%010" PRIx64, pid);
uint8_t class = (cid >> 12) & 0xf;
uint16_t part_num = pid & 0xfff;
@@ -1233,12 +1233,12 @@ static int dap_rom_display(struct command_invocation *cmd,
if (designer_id & 0x80) {
/* JEP106 code */
command_print(cmd->ctx, "\t\tDesigner is 0x%03" PRIx16 ", %s",
command_print(cmd, "\t\tDesigner is 0x%03" PRIx16 ", %s",
designer_id, jep106_manufacturer(designer_id >> 8, designer_id & 0x7f));
} else {
/* Legacy ASCII ID, clear invalid bits */
designer_id &= 0x7f;
command_print(cmd->ctx, "\t\tDesigner ASCII code 0x%02" PRIx16 ", %s",
command_print(cmd, "\t\tDesigner ASCII code 0x%02" PRIx16 ", %s",
designer_id, designer_id == 0x41 ? "ARM" : "<unknown>");
}
@@ -1260,8 +1260,8 @@ static int dap_rom_display(struct command_invocation *cmd,
break;
}
command_print(cmd->ctx, "\t\tPart is 0x%" PRIx16", %s %s", part_num, type, full);
command_print(cmd->ctx, "\t\tComponent class is 0x%" PRIx8 ", %s", class, class_description[class]);
command_print(cmd, "\t\tPart is 0x%" PRIx16", %s %s", part_num, type, full);
command_print(cmd, "\t\tComponent class is 0x%" PRIx8 ", %s", class, class_description[class]);
if (class == 1) { /* ROM Table */
uint32_t memtype;
@@ -1270,9 +1270,9 @@ static int dap_rom_display(struct command_invocation *cmd,
return retval;
if (memtype & 0x01)
command_print(cmd->ctx, "\t\tMEMTYPE system memory present on bus");
command_print(cmd, "\t\tMEMTYPE system memory present on bus");
else
command_print(cmd->ctx, "\t\tMEMTYPE system memory not present: dedicated debug bus");
command_print(cmd, "\t\tMEMTYPE system memory not present: dedicated debug bus");
/* Read ROM table entries from base address until we get 0x00000000 or reach the reserved area */
for (uint16_t entry_offset = 0; entry_offset < 0xF00; entry_offset += 4) {
@@ -1280,7 +1280,7 @@ static int dap_rom_display(struct command_invocation *cmd,
retval = mem_ap_read_atomic_u32(ap, base_addr | entry_offset, &romentry);
if (retval != ERROR_OK)
return retval;
command_print(cmd->ctx, "\t%sROMTABLE[0x%x] = 0x%" PRIx32 "",
command_print(cmd, "\t%sROMTABLE[0x%x] = 0x%" PRIx32 "",
tabs, entry_offset, romentry);
if (romentry & 0x01) {
/* Recurse */
@@ -1288,9 +1288,9 @@ static int dap_rom_display(struct command_invocation *cmd,
if (retval != ERROR_OK)
return retval;
} else if (romentry != 0) {
command_print(cmd->ctx, "\t\tComponent not present");
command_print(cmd, "\t\tComponent not present");
} else {
command_print(cmd->ctx, "\t%s\tEnd of ROM table", tabs);
command_print(cmd, "\t%s\tEnd of ROM table", tabs);
break;
}
}
@@ -1435,7 +1435,7 @@ static int dap_rom_display(struct command_invocation *cmd,
}
break;
}
command_print(cmd->ctx, "\t\tType is 0x%02" PRIx8 ", %s, %s",
command_print(cmd, "\t\tType is 0x%02" PRIx8 ", %s, %s",
(uint8_t)(devtype & 0xff),
major, subtype);
/* REVISIT also show 0xfc8 DevId */
@@ -1456,27 +1456,27 @@ int dap_info_command(struct command_invocation *cmd,
if (retval != ERROR_OK)
return retval;
command_print(cmd->ctx, "AP ID register 0x%8.8" PRIx32, apid);
command_print(cmd, "AP ID register 0x%8.8" PRIx32, apid);
if (apid == 0) {
command_print(cmd->ctx, "No AP found at this ap 0x%x", ap->ap_num);
command_print(cmd, "No AP found at this ap 0x%x", ap->ap_num);
return ERROR_FAIL;
}
switch (apid & (IDR_JEP106 | IDR_TYPE)) {
case IDR_JEP106_ARM | AP_TYPE_JTAG_AP:
command_print(cmd->ctx, "\tType is JTAG-AP");
command_print(cmd, "\tType is JTAG-AP");
break;
case IDR_JEP106_ARM | AP_TYPE_AHB_AP:
command_print(cmd->ctx, "\tType is MEM-AP AHB");
command_print(cmd, "\tType is MEM-AP AHB");
break;
case IDR_JEP106_ARM | AP_TYPE_APB_AP:
command_print(cmd->ctx, "\tType is MEM-AP APB");
command_print(cmd, "\tType is MEM-AP APB");
break;
case IDR_JEP106_ARM | AP_TYPE_AXI_AP:
command_print(cmd->ctx, "\tType is MEM-AP AXI");
command_print(cmd, "\tType is MEM-AP AXI");
break;
default:
command_print(cmd->ctx, "\tUnknown AP type");
command_print(cmd, "\tUnknown AP type");
break;
}
@@ -1485,15 +1485,15 @@ int dap_info_command(struct command_invocation *cmd,
*/
mem_ap = (apid & IDR_CLASS) == AP_CLASS_MEM_AP;
if (mem_ap) {
command_print(cmd->ctx, "MEM-AP BASE 0x%8.8" PRIx32, dbgbase);
command_print(cmd, "MEM-AP BASE 0x%8.8" PRIx32, dbgbase);
if (dbgbase == 0xFFFFFFFF || (dbgbase & 0x3) == 0x2) {
command_print(cmd->ctx, "\tNo ROM table present");
command_print(cmd, "\tNo ROM table present");
} else {
if (dbgbase & 0x01)
command_print(cmd->ctx, "\tValid ROM table present");
command_print(cmd, "\tValid ROM table present");
else
command_print(cmd->ctx, "\tROM table in legacy format");
command_print(cmd, "\tROM table in legacy format");
dap_rom_display(cmd, ap, dbgbase & 0xFFFFF000, 0);
}
@@ -1681,7 +1681,7 @@ COMMAND_HANDLER(dap_baseaddr_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
command_print(CMD, "0x%8.8" PRIx32, baseaddr);
return retval;
}
@@ -1703,7 +1703,7 @@ COMMAND_HANDLER(dap_memaccess_command)
}
dap->ap[dap->apsel].memaccess_tck = memaccess_tck;
command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
command_print(CMD, "memory bus access delay set to %" PRIi32 " tck",
dap->ap[dap->apsel].memaccess_tck);
return ERROR_OK;
@@ -1716,7 +1716,7 @@ COMMAND_HANDLER(dap_apsel_command)
switch (CMD_ARGC) {
case 0:
command_print(CMD_CTX, "%" PRIi32, dap->apsel);
command_print(CMD, "%" PRIi32, dap->apsel);
return ERROR_OK;
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
@@ -1740,7 +1740,7 @@ COMMAND_HANDLER(dap_apcsw_command)
switch (CMD_ARGC) {
case 0:
command_print(CMD_CTX, "ap %" PRIi32 " selected, csw 0x%8.8" PRIx32,
command_print(CMD, "ap %" PRIi32 " selected, csw 0x%8.8" PRIx32,
dap->apsel, apcsw);
return ERROR_OK;
case 1:
@@ -1801,7 +1801,7 @@ COMMAND_HANDLER(dap_apid_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
command_print(CMD, "0x%8.8" PRIx32, apid);
return retval;
}
@@ -1853,7 +1853,7 @@ COMMAND_HANDLER(dap_apreg_command)
return retval;
if (CMD_ARGC == 2)
command_print(CMD_CTX, "0x%08" PRIx32, value);
command_print(CMD, "0x%08" PRIx32, value);
return retval;
}
@@ -1884,7 +1884,7 @@ COMMAND_HANDLER(dap_dpreg_command)
return retval;
if (CMD_ARGC == 1)
command_print(CMD_CTX, "0x%08" PRIx32, value);
command_print(CMD, "0x%08" PRIx32, value);
return retval;
}
@@ -1906,7 +1906,7 @@ COMMAND_HANDLER(dap_ti_be_32_quirks_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
dap->ti_be_32_quirks = enable;
command_print(CMD_CTX, "TI BE-32 quirks mode %s",
command_print(CMD, "TI BE-32 quirks mode %s",
enable ? "enabled" : "disabled");
return 0;

4
src/target/arm_cti.c
View File

@@ -252,7 +252,7 @@ COMMAND_HANDLER(handle_cti_dump)
return JIM_ERR;
for (int i = 0; i < (int)ARRAY_SIZE(cti_names); i++)
command_print(CMD_CTX, "%8.8s (0x%04"PRIx32") 0x%08"PRIx32,
command_print(CMD, "%8.8s (0x%04"PRIx32") 0x%08"PRIx32,
cti_names[i].label, cti_names[i].offset, *cti_names[i].p_val);
return JIM_OK;
@@ -336,7 +336,7 @@ COMMAND_HANDLER(handle_cti_read)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%08"PRIx32, value);
command_print(CMD, "0x%08"PRIx32, value);
return ERROR_OK;
}

24
src/target/armv4_5.c
View File

@@ -778,17 +778,17 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
struct reg *regs;
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "error: target must be halted for register accesses");
command_print(CMD, "error: target must be halted for register accesses");
return ERROR_FAIL;
}
if (arm->core_type != ARM_MODE_ANY) {
command_print(CMD_CTX,
command_print(CMD,
"Microcontroller Profile not supported - use standard reg cmd");
return ERROR_OK;
}
@@ -799,7 +799,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
}
if (!arm->full_context) {
command_print(CMD_CTX, "error: target doesn't support %s",
command_print(CMD, "error: target doesn't support %s",
CMD_NAME);
return ERROR_FAIL;
}
@@ -828,7 +828,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
shadow = "shadow ";
break;
}
command_print(CMD_CTX, "%s%s mode %sregisters",
command_print(CMD, "%s%s mode %sregisters",
sep, name, shadow);
/* display N rows of up to 4 registers each */
@@ -855,7 +855,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
"%8s: %8.8" PRIx32 " ",
reg->name, value);
}
command_print(CMD_CTX, "%s", output);
command_print(CMD, "%s", output);
}
}
@@ -868,13 +868,13 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
struct arm *arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
if (arm->core_type == ARM_MODE_THREAD) {
/* armv7m not supported */
command_print(CMD_CTX, "Unsupported Command");
command_print(CMD, "Unsupported Command");
return ERROR_OK;
}
@@ -885,7 +885,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
arm->core_state = ARM_STATE_THUMB;
}
command_print(CMD_CTX, "core state: %s", arm_state_strings[arm->core_state]);
command_print(CMD, "core state: %s", arm_state_strings[arm->core_state]);
return ERROR_OK;
}
@@ -906,7 +906,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
int thumb = 0;
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
@@ -928,7 +928,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address);
if (address & 0x01) {
if (!thumb) {
command_print(CMD_CTX, "Disassemble as Thumb");
command_print(CMD, "Disassemble as Thumb");
thumb = 1;
}
address &= ~1;
@@ -963,7 +963,7 @@ usage:
if (retval != ERROR_OK)
break;
}
command_print(CMD_CTX, "%s", cur_instruction.text);
command_print(CMD, "%s", cur_instruction.text);
address += cur_instruction.instruction_size;
}

8
src/target/armv4_5_cache.c
View File

@@ -79,20 +79,20 @@ int armv4_5_identify_cache(uint32_t cache_type_reg, struct armv4_5_cache_common
int armv4_5_handle_cache_info_command(struct command_invocation *cmd, struct armv4_5_cache_common *armv4_5_cache)
{
if (armv4_5_cache->ctype == -1) {
command_print(cmd->ctx, "cache not yet identified");
command_print(cmd, "cache not yet identified");
return ERROR_OK;
}
command_print(cmd->ctx, "cache type: 0x%1.1x, %s", armv4_5_cache->ctype,
command_print(cmd, "cache type: 0x%1.1x, %s", armv4_5_cache->ctype,
(armv4_5_cache->separate) ? "separate caches" : "unified cache");
command_print(cmd->ctx, "D-Cache: linelen %i, associativity %i, nsets %i, cachesize 0x%x",
command_print(cmd, "D-Cache: linelen %i, associativity %i, nsets %i, cachesize 0x%x",
armv4_5_cache->d_u_size.linelen,
armv4_5_cache->d_u_size.associativity,
armv4_5_cache->d_u_size.nsets,
armv4_5_cache->d_u_size.cachesize);
command_print(cmd->ctx, "I-Cache: linelen %i, associativity %i, nsets %i, cachesize 0x%x",
command_print(cmd, "I-Cache: linelen %i, associativity %i, nsets %i, cachesize 0x%x",
armv4_5_cache->i_size.linelen,
armv4_5_cache->i_size.associativity,
armv4_5_cache->i_size.nsets,

10
src/target/armv7a.c
View File

@@ -229,7 +229,7 @@ COMMAND_HANDLER(handle_cache_l2x)
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
/* command_print(CMD_CTX, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
/* command_print(CMD, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], base);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], way);
@@ -248,7 +248,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
int cl;
if (armv7a_cache->info == -1) {
command_print(cmd->ctx, "cache not yet identified");
command_print(cmd, "cache not yet identified");
return ERROR_OK;
}
@@ -256,7 +256,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
struct armv7a_arch_cache *arch = &(armv7a_cache->arch[cl]);
if (arch->ctype & 1) {
command_print(cmd->ctx,
command_print(cmd,
"L%d I-Cache: linelen %" PRIi32
", associativity %" PRIi32
", nsets %" PRIi32
@@ -269,7 +269,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
}
if (arch->ctype >= 2) {
command_print(cmd->ctx,
command_print(cmd,
"L%d D-Cache: linelen %" PRIi32
", associativity %" PRIi32
", nsets %" PRIi32
@@ -283,7 +283,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
}
if (l2x_cache != NULL)
command_print(cmd->ctx, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
l2x_cache->base, l2x_cache->way);
return ERROR_OK;

2
src/target/armv7a_cache.c
View File

@@ -513,7 +513,7 @@ COMMAND_HANDLER(arm7a_cache_disable_auto_cmd)
struct armv7a_common *armv7a = target_to_armv7a(target);
if (CMD_ARGC == 0) {
command_print(CMD_CTX, "auto cache is %s",
command_print(CMD, "auto cache is %s",
armv7a->armv7a_mmu.armv7a_cache.auto_cache_enabled ? "enabled" : "disabled");
return ERROR_OK;
}

6
src/target/armv7a_cache_l2x.c
View File

@@ -180,11 +180,11 @@ static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd,
(armv7a_cache->outer_cache);
if (armv7a_cache->info == -1) {
command_print(cmd->ctx, "cache not yet identified");
command_print(cmd, "cache not yet identified");
return ERROR_OK;
}
command_print(cmd->ctx,
command_print(cmd,
"L2 unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
l2x_cache->base, l2x_cache->way);
@@ -312,7 +312,7 @@ COMMAND_HANDLER(armv7a_l2x_cache_conf_cmd)
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
/* command_print(CMD_CTX, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
/* command_print(CMD, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], base);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], way);

4
src/target/armv8.c
View File

@@ -1054,7 +1054,7 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command)
return ERROR_FAIL;
}
command_print(CMD_CTX, "Exception Catch: Secure: %s, Non-Secure: %s", sec, nsec);
command_print(CMD, "Exception Catch: Secure: %s, Non-Secure: %s", sec, nsec);
return ERROR_OK;
}
@@ -1083,7 +1083,7 @@ int armv8_handle_cache_info_command(struct command_invocation *cmd,
struct armv8_cache_common *armv8_cache)
{
if (armv8_cache->info == -1) {
command_print(cmd->ctx, "cache not yet identified");
command_print(cmd, "cache not yet identified");
return ERROR_OK;
}

6
src/target/armv8_cache.c
View File

@@ -194,7 +194,7 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
int cl;
if (armv8_cache->info == -1) {
command_print(cmd->ctx, "cache not yet identified");
command_print(cmd, "cache not yet identified");
return ERROR_OK;
}
@@ -202,7 +202,7 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
struct armv8_arch_cache *arch = &(armv8_cache->arch[cl]);
if (arch->ctype & 1) {
command_print(cmd->ctx,
command_print(cmd,
"L%d I-Cache: linelen %" PRIi32
", associativity %" PRIi32
", nsets %" PRIi32
@@ -215,7 +215,7 @@ static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
}
if (arch->ctype >= 2) {
command_print(cmd->ctx,
command_print(cmd,
"L%d D-Cache: linelen %" PRIi32
", associativity %" PRIi32
", nsets %" PRIi32

4
src/target/cortex_a.c
View File

@@ -2969,7 +2969,7 @@ COMMAND_HANDLER(handle_cortex_a_mask_interrupts_command)
}
n = Jim_Nvp_value2name_simple(nvp_maskisr_modes, cortex_a->isrmasking_mode);
command_print(CMD_CTX, "cortex_a interrupt mask %s", n->name);
command_print(CMD, "cortex_a interrupt mask %s", n->name);
return ERROR_OK;
}
@@ -2995,7 +2995,7 @@ COMMAND_HANDLER(handle_cortex_a_dacrfixup_command)
}
n = Jim_Nvp_value2name_simple(nvp_dacrfixup_modes, cortex_a->dacrfixup_mode);
command_print(CMD_CTX, "cortex_a domain access control fixup %s", n->name);
command_print(CMD, "cortex_a domain access control fixup %s", n->name);
return ERROR_OK;
}

10
src/target/cortex_m.c
View File

@@ -2370,7 +2370,7 @@ static int cortex_m_verify_pointer(struct command_invocation *cmd,
struct cortex_m_common *cm)
{
if (cm->common_magic != CORTEX_M_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not a Cortex-M");
command_print(cmd, "target is not a Cortex-M");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -2459,7 +2459,7 @@ write:
}
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) {
command_print(CMD_CTX, "%9s: %s", vec_ids[i].name,
command_print(CMD, "%9s: %s", vec_ids[i].name,
(demcr & vec_ids[i].mask) ? "catch" : "ignore");
}
@@ -2487,7 +2487,7 @@ COMMAND_HANDLER(handle_cortex_m_mask_interrupts_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -2500,7 +2500,7 @@ COMMAND_HANDLER(handle_cortex_m_mask_interrupts_command)
}
n = Jim_Nvp_value2name_simple(nvp_maskisr_modes, cortex_m->isrmasking_mode);
command_print(CMD_CTX, "cortex_m interrupt mask %s", n->name);
command_print(CMD, "cortex_m interrupt mask %s", n->name);
return ERROR_OK;
}
@@ -2545,7 +2545,7 @@ COMMAND_HANDLER(handle_cortex_m_reset_config_command)
break;
}
command_print(CMD_CTX, "cortex_m reset_config %s", reset_config);
command_print(CMD, "cortex_m reset_config %s", reset_config);
return ERROR_OK;
}

2
src/target/dsp563xx.c
View File

@@ -1930,7 +1930,7 @@ static void handle_md_output(struct command_invocation *cmd,
value);
if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
command_print(cmd->ctx, "%s", output);
command_print(cmd, "%s", output);
output_len = 0;
}
}

6
src/target/esirisc.c
View File

@@ -1680,7 +1680,7 @@ COMMAND_HANDLER(handle_esirisc_cache_arch_command)
}
}
command_print(CMD_CTX, "esirisc cache_arch %s", esirisc_cache_arch_name(esirisc));
command_print(CMD, "esirisc cache_arch %s", esirisc_cache_arch_name(esirisc));
return ERROR_OK;
}
@@ -1698,7 +1698,7 @@ COMMAND_HANDLER(handle_esirisc_flush_caches_command)
retval = esirisc_flush_caches(target);
command_print(CMD_CTX, "cache flush %s",
command_print(CMD, "cache flush %s",
(retval == ERROR_OK) ? "successful" : "failed");
return retval;
@@ -1748,7 +1748,7 @@ COMMAND_HANDLER(handle_esirisc_hwdc_command)
}
for (size_t i = 0; i < ARRAY_SIZE(esirisc_hwdc_masks); ++i)
command_print(CMD_CTX, "%9s: %s", esirisc_hwdc_masks[i].name,
command_print(CMD, "%9s: %s", esirisc_hwdc_masks[i].name,
(esirisc->hwdc_save & esirisc_hwdc_masks[i].mask) ? "enabled" : "disabled");
return ERROR_OK;

106
src/target/esirisc_trace.c
View File

@@ -403,7 +403,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
case ESIRISC_TRACE_ID_EXECUTE:
case ESIRISC_TRACE_ID_STALL:
case ESIRISC_TRACE_ID_BRANCH:
command_print(cmd->ctx, "%s", esirisc_trace_id_strings[id]);
command_print(cmd, "%s", esirisc_trace_id_strings[id]);
break;
case ESIRISC_TRACE_ID_EXTENDED: {
@@ -417,7 +417,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
case ESIRISC_TRACE_EXT_ID_STOP:
case ESIRISC_TRACE_EXT_ID_WAIT:
case ESIRISC_TRACE_EXT_ID_MULTICYCLE:
command_print(cmd->ctx, "%s", esirisc_trace_ext_id_strings[ext_id]);
command_print(cmd, "%s", esirisc_trace_ext_id_strings[ext_id]);
break;
case ESIRISC_TRACE_EXT_ID_ERET:
@@ -430,11 +430,11 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
if (retval != ERROR_OK)
goto fail;
command_print(cmd->ctx, "%s PC: 0x%" PRIx32,
command_print(cmd, "%s PC: 0x%" PRIx32,
esirisc_trace_ext_id_strings[ext_id], pc);
if (ext_id == ESIRISC_TRACE_EXT_ID_END_PC) {
command_print(cmd->ctx, "--- end of trace ---");
command_print(cmd, "--- end of trace ---");
return ERROR_OK;
}
break;
@@ -450,7 +450,7 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
if (retval != ERROR_OK)
goto fail;
command_print(cmd->ctx, "%s EID: 0x%" PRIx32 ", EPC: 0x%" PRIx32,
command_print(cmd, "%s EID: 0x%" PRIx32 ", EPC: 0x%" PRIx32,
esirisc_trace_ext_id_strings[ext_id], eid, epc);
break;
}
@@ -461,28 +461,28 @@ static int esirisc_trace_analyze_full(struct command_invocation *cmd, uint8_t *b
if (retval != ERROR_OK)
goto fail;
command_print(cmd->ctx, "repeats %" PRId32 " %s", count,
command_print(cmd, "repeats %" PRId32 " %s", count,
(count == 1) ? "time" : "times");
break;
}
case ESIRISC_TRACE_EXT_ID_END:
command_print(cmd->ctx, "--- end of trace ---");
command_print(cmd, "--- end of trace ---");
return ERROR_OK;
default:
command_print(cmd->ctx, "invalid extended trace ID: %" PRId32, ext_id);
command_print(cmd, "invalid extended trace ID: %" PRId32, ext_id);
return ERROR_FAIL;
}
break;
}
default:
command_print(cmd->ctx, "invalid trace ID: %" PRId32, id);
command_print(cmd, "invalid trace ID: %" PRId32, id);
return ERROR_FAIL;
}
}
fail:
command_print(cmd->ctx, "trace buffer too small");
command_print(cmd, "trace buffer too small");
return ERROR_BUF_TOO_SMALL;
}
@@ -504,14 +504,14 @@ static int esirisc_trace_analyze_simple(struct command_invocation *cmd, uint8_t
break;
if (pc == end_of_trace) {
command_print(cmd->ctx, "--- end of trace ---");
command_print(cmd, "--- end of trace ---");
return ERROR_OK;
}
command_print(cmd->ctx, "PC: 0x%" PRIx32, pc);
command_print(cmd, "PC: 0x%" PRIx32, pc);
}
command_print(cmd->ctx, "trace buffer too small");
command_print(cmd, "trace buffer too small");
return ERROR_BUF_TOO_SMALL;
}
@@ -523,19 +523,19 @@ static int esirisc_trace_analyze(struct command_invocation *cmd, uint8_t *buffer
switch (trace_info->format) {
case ESIRISC_TRACE_FORMAT_FULL:
command_print(cmd->ctx, "--- full pipeline ---");
command_print(cmd, "--- full pipeline ---");
return esirisc_trace_analyze_full(cmd, buffer, size);
case ESIRISC_TRACE_FORMAT_BRANCH:
command_print(cmd->ctx, "--- branches taken ---");
command_print(cmd, "--- branches taken ---");
return esirisc_trace_analyze_full(cmd, buffer, size);
case ESIRISC_TRACE_FORMAT_ICACHE:
command_print(cmd->ctx, "--- icache misses ---");
command_print(cmd, "--- icache misses ---");
return esirisc_trace_analyze_simple(cmd, buffer, size);
default:
command_print(cmd->ctx, "invalid trace format: %i", trace_info->format);
command_print(cmd, "invalid trace format: %i", trace_info->format);
return ERROR_FAIL;
}
}
@@ -552,7 +552,7 @@ static int esirisc_trace_analyze_buffer(struct command_invocation *cmd)
size = esirisc_trace_buffer_size(trace_info);
buffer = calloc(1, size);
if (buffer == NULL) {
command_print(cmd->ctx, "out of memory");
command_print(cmd, "out of memory");
return ERROR_FAIL;
}
@@ -577,7 +577,7 @@ static int esirisc_trace_analyze_memory(struct command_invocation *cmd,
buffer = calloc(1, size);
if (buffer == NULL) {
command_print(cmd->ctx, "out of memory");
command_print(cmd, "out of memory");
return ERROR_FAIL;
}
@@ -602,15 +602,15 @@ static int esirisc_trace_dump(struct command_invocation *cmd, const char *filena
retval = fileio_open(&fileio, filename, FILEIO_WRITE, FILEIO_BINARY);
if (retval != ERROR_OK) {
command_print(cmd->ctx, "could not open dump file: %s", filename);
command_print(cmd, "could not open dump file: %s", filename);
return retval;
}
retval = fileio_write(fileio, size, buffer, &size_written);
if (retval == ERROR_OK)
command_print(cmd->ctx, "trace data dumped to: %s", filename);
command_print(cmd, "trace data dumped to: %s", filename);
else
command_print(cmd->ctx, "could not write dump file: %s", filename);
command_print(cmd, "could not write dump file: %s", filename);
fileio_close(fileio);
@@ -629,7 +629,7 @@ static int esirisc_trace_dump_buffer(struct command_invocation *cmd, const char
size = esirisc_trace_buffer_size(trace_info);
buffer = calloc(1, size);
if (buffer == NULL) {
command_print(cmd->ctx, "out of memory");
command_print(cmd, "out of memory");
return ERROR_FAIL;
}
@@ -654,7 +654,7 @@ static int esirisc_trace_dump_memory(struct command_invocation *cmd, const char
buffer = calloc(1, size);
if (buffer == NULL) {
command_print(cmd->ctx, "out of memory");
command_print(cmd, "out of memory");
return ERROR_FAIL;
}
@@ -676,13 +676,13 @@ COMMAND_HANDLER(handle_esirisc_trace_init_command)
struct esirisc_common *esirisc = target_to_esirisc(target);
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
int retval = esirisc_trace_init(target);
if (retval == ERROR_OK)
command_print(CMD_CTX, "trace initialized");
command_print(CMD, "trace initialized");
return retval;
}
@@ -694,42 +694,42 @@ COMMAND_HANDLER(handle_esirisc_trace_info_command)
struct esirisc_trace *trace_info = &esirisc->trace_info;
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
if (esirisc_trace_is_fifo(trace_info))
command_print(CMD_CTX, "trace FIFO address: 0x%" TARGET_PRIxADDR,
command_print(CMD, "trace FIFO address: 0x%" TARGET_PRIxADDR,
trace_info->buffer_start);
else {
command_print(CMD_CTX, "trace buffer start: 0x%" TARGET_PRIxADDR,
command_print(CMD, "trace buffer start: 0x%" TARGET_PRIxADDR,
trace_info->buffer_start);
command_print(CMD_CTX, "trace buffer end: 0x%" TARGET_PRIxADDR,
command_print(CMD, "trace buffer end: 0x%" TARGET_PRIxADDR,
trace_info->buffer_end);
command_print(CMD_CTX, "trace buffer will %swrap",
command_print(CMD, "trace buffer will %swrap",
trace_info->buffer_wrap ? "" : "not ");
}
command_print(CMD_CTX, "flow control: %s",
command_print(CMD, "flow control: %s",
trace_info->flow_control ? "enabled" : "disabled");
command_print(CMD_CTX, "trace format: %s",
command_print(CMD, "trace format: %s",
esirisc_trace_format_strings[trace_info->format]);
command_print(CMD_CTX, "number of PC bits: %i", trace_info->pc_bits);
command_print(CMD, "number of PC bits: %i", trace_info->pc_bits);
command_print(CMD_CTX, "start trigger: %s",
command_print(CMD, "start trigger: %s",
esirisc_trace_trigger_strings[trace_info->start_trigger]);
command_print(CMD_CTX, "start data: 0x%" PRIx32, trace_info->start_data);
command_print(CMD_CTX, "start mask: 0x%" PRIx32, trace_info->start_mask);
command_print(CMD, "start data: 0x%" PRIx32, trace_info->start_data);
command_print(CMD, "start mask: 0x%" PRIx32, trace_info->start_mask);
command_print(CMD_CTX, "stop trigger: %s",
command_print(CMD, "stop trigger: %s",
esirisc_trace_trigger_strings[trace_info->stop_trigger]);
command_print(CMD_CTX, "stop data: 0x%" PRIx32, trace_info->stop_data);
command_print(CMD_CTX, "stop mask: 0x%" PRIx32, trace_info->stop_mask);
command_print(CMD, "stop data: 0x%" PRIx32, trace_info->stop_data);
command_print(CMD, "stop mask: 0x%" PRIx32, trace_info->stop_mask);
command_print(CMD_CTX, "trigger delay: %s",
command_print(CMD, "trigger delay: %s",
esirisc_trace_delay_strings[trace_info->delay]);
command_print(CMD_CTX, "trigger delay cycles: %i", trace_info->delay_cycles);
command_print(CMD, "trigger delay cycles: %i", trace_info->delay_cycles);
return ERROR_OK;
}
@@ -741,7 +741,7 @@ COMMAND_HANDLER(handle_esirisc_trace_status_command)
uint32_t status;
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
@@ -749,7 +749,7 @@ COMMAND_HANDLER(handle_esirisc_trace_status_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "trace is %s%s%s%s",
command_print(CMD, "trace is %s%s%s%s",
(status & STATUS_T) ? "started" : "stopped",
(status & STATUS_TD) ? ", disabled" : "",
(status & STATUS_W) ? ", wrapped" : "",
@@ -764,13 +764,13 @@ COMMAND_HANDLER(handle_esirisc_trace_start_command)
struct esirisc_common *esirisc = target_to_esirisc(target);
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
int retval = esirisc_trace_start(target);
if (retval == ERROR_OK)
command_print(CMD_CTX, "trace started");
command_print(CMD, "trace started");
return retval;
}
@@ -781,13 +781,13 @@ COMMAND_HANDLER(handle_esirisc_trace_stop_command)
struct esirisc_common *esirisc = target_to_esirisc(target);
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
int retval = esirisc_trace_stop(target);
if (retval == ERROR_OK)
command_print(CMD_CTX, "trace stopped");
command_print(CMD, "trace stopped");
return retval;
}
@@ -801,7 +801,7 @@ COMMAND_HANDLER(handle_esirisc_trace_analyze_command)
uint32_t size;
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
@@ -817,7 +817,7 @@ COMMAND_HANDLER(handle_esirisc_trace_analyze_command)
* as arguments as a workaround.
*/
if (esirisc_trace_is_fifo(trace_info)) {
command_print(CMD_CTX, "analyze from FIFO not supported");
command_print(CMD, "analyze from FIFO not supported");
return ERROR_FAIL;
}
@@ -839,7 +839,7 @@ COMMAND_HANDLER(handle_esirisc_trace_dump_command)
uint32_t size;
if (!esirisc->has_trace) {
command_print(CMD_CTX, "target does not support trace");
command_print(CMD, "target does not support trace");
return ERROR_FAIL;
}
@@ -849,7 +849,7 @@ COMMAND_HANDLER(handle_esirisc_trace_dump_command)
if (CMD_ARGC == 1) {
/* also see: handle_esirisc_trace_analyze_command() */
if (esirisc_trace_is_fifo(trace_info)) {
command_print(CMD_CTX, "dump from FIFO not supported");
command_print(CMD, "dump from FIFO not supported");
return ERROR_FAIL;
}
@@ -946,7 +946,7 @@ COMMAND_HANDLER(handle_esirisc_trace_format_command)
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], pc_bits);
if (pc_bits < 1 || pc_bits > 31) {
command_print(CMD_CTX, "invalid pc_bits: %i; must be 1..31", pc_bits);
command_print(CMD, "invalid pc_bits: %i; must be 1..31", pc_bits);
return ERROR_COMMAND_SYNTAX_ERROR;
}

14
src/target/etb.c
View File

@@ -344,13 +344,13 @@ COMMAND_HANDLER(handle_etb_config_command)
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
command_print(CMD, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
return ERROR_FAIL;
}
tap = jtag_tap_by_string(CMD_ARGV[1]);
if (tap == NULL) {
command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]);
command_print(CMD, "ETB: TAP %s does not exist", CMD_ARGV[1]);
return ERROR_FAIL;
}
@@ -382,17 +382,17 @@ COMMAND_HANDLER(handle_etb_trigger_percent_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETB: current target isn't an ARM");
command_print(CMD, "ETB: current target isn't an ARM");
return ERROR_FAIL;
}
etm = arm->etm;
if (!etm) {
command_print(CMD_CTX, "ETB: target has no ETM configured");
command_print(CMD, "ETB: target has no ETM configured");
return ERROR_FAIL;
}
if (etm->capture_driver != &etb_capture_driver) {
command_print(CMD_CTX, "ETB: target not using ETB");
command_print(CMD, "ETB: target not using ETB");
return ERROR_FAIL;
}
etb = arm->etm->capture_driver_priv;
@@ -402,13 +402,13 @@ COMMAND_HANDLER(handle_etb_trigger_percent_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_value);
if ((new_value < 2) || (new_value > 100))
command_print(CMD_CTX,
command_print(CMD,
"valid percentages are 2%% to 100%%");
else
etb->trigger_percent = (unsigned) new_value;
}
command_print(CMD_CTX, "%d percent of tracebuffer fills after trigger",
command_print(CMD, "%d percent of tracebuffer fills after trigger",
etb->trigger_percent);
return ERROR_OK;

178
src/target/etm.c
View File

@@ -869,7 +869,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
ctx->capture_driver->read_trace(ctx);
if (ctx->trace_depth == 0) {
command_print(cmd->ctx, "Trace is empty.");
command_print(cmd, "Trace is empty.");
return ERROR_OK;
}
@@ -893,7 +893,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
int current_pc_ok = ctx->pc_ok;
if (ctx->trace_data[ctx->pipe_index].flags & ETMV1_TRIGGER_CYCLE)
command_print(cmd->ctx, "--- trigger ---");
command_print(cmd, "--- trigger ---");
/* instructions execute in IE/D or BE/D cycles */
if ((pipestat == STAT_IE) || (pipestat == STAT_ID))
@@ -942,7 +942,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
next_pc = ctx->last_branch;
break;
case 0x1: /* tracing enabled */
command_print(cmd->ctx,
command_print(cmd,
"--- tracing enabled at 0x%8.8" PRIx32 " ---",
ctx->last_branch);
ctx->current_pc = ctx->last_branch;
@@ -950,7 +950,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
continue;
break;
case 0x2: /* trace restarted after FIFO overflow */
command_print(cmd->ctx,
command_print(cmd,
"--- trace restarted after FIFO overflow at 0x%8.8" PRIx32 " ---",
ctx->last_branch);
ctx->current_pc = ctx->last_branch;
@@ -958,7 +958,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
continue;
break;
case 0x3: /* exit from debug state */
command_print(cmd->ctx,
command_print(cmd,
"--- exit from debug state at 0x%8.8" PRIx32 " ---",
ctx->last_branch);
ctx->current_pc = ctx->last_branch;
@@ -971,7 +971,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
* we have to move on with the next trace cycle
*/
if (!current_pc_ok) {
command_print(cmd->ctx,
command_print(cmd,
"--- periodic synchronization point at 0x%8.8" PRIx32 " ---",
next_pc);
ctx->current_pc = next_pc;
@@ -998,9 +998,9 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
|| ((ctx->last_branch >= 0xffff0000) &&
(ctx->last_branch <= 0xffff0020))) {
if ((ctx->last_branch & 0xff) == 0x10)
command_print(cmd->ctx, "data abort");
command_print(cmd, "data abort");
else {
command_print(cmd->ctx,
command_print(cmd,
"exception vector 0x%2.2" PRIx32 "",
ctx->last_branch);
ctx->current_pc = ctx->last_branch;
@@ -1058,7 +1058,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
ctx->ptr_ok = 1;
if (ctx->ptr_ok)
command_print(cmd->ctx,
command_print(cmd,
"address: 0x%8.8" PRIx32 "",
ctx->last_ptr);
}
@@ -1073,7 +1073,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
uint32_t data;
if (etmv1_data(ctx, 4, &data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
command_print(cmd->ctx,
command_print(cmd,
"data: 0x%8.8" PRIx32 "",
data);
}
@@ -1084,7 +1084,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
if (etmv1_data(ctx, arm_access_size(&instruction),
&data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
command_print(cmd->ctx, "data: 0x%8.8" PRIx32 "", data);
command_print(cmd, "data: 0x%8.8" PRIx32 "", data);
}
}
@@ -1119,7 +1119,7 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
(cycles == 1) ? "cycle" : "cycles");
}
command_print(cmd->ctx, "%s%s%s",
command_print(cmd, "%s%s%s",
instruction.text,
(pipestat == STAT_IN) ? " (not executed)" : "",
cycles_text);
@@ -1156,7 +1156,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
else if (strcmp(CMD_ARGV[0], "all") == 0)
tracemode = ETM_CTRL_TRACE_DATA | ETM_CTRL_TRACE_ADDR;
else {
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[0]);
command_print(CMD, "invalid option '%s'", CMD_ARGV[0]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1176,7 +1176,7 @@ static COMMAND_HELPER(handle_etm_tracemode_command_update,
tracemode |= ETM_CTRL_CONTEXTID_32;
break;
default:
command_print(CMD_CTX, "invalid option '%s'", CMD_ARGV[1]);
command_print(CMD, "invalid option '%s'", CMD_ARGV[1]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1207,13 +1207,13 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
struct etm_context *etm;
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm = arm->etm;
if (!etm) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
@@ -1235,47 +1235,47 @@ COMMAND_HANDLER(handle_etm_tracemode_command)
* or couldn't be written; display actual hardware state...
*/
command_print(CMD_CTX, "current tracemode configuration:");
command_print(CMD, "current tracemode configuration:");
switch (tracemode & ETM_CTRL_TRACE_MASK) {
default:
command_print(CMD_CTX, "data tracing: none");
command_print(CMD, "data tracing: none");
break;
case ETM_CTRL_TRACE_DATA:
command_print(CMD_CTX, "data tracing: data only");
command_print(CMD, "data tracing: data only");
break;
case ETM_CTRL_TRACE_ADDR:
command_print(CMD_CTX, "data tracing: address only");
command_print(CMD, "data tracing: address only");
break;
case ETM_CTRL_TRACE_DATA | ETM_CTRL_TRACE_ADDR:
command_print(CMD_CTX, "data tracing: address and data");
command_print(CMD, "data tracing: address and data");
break;
}
switch (tracemode & ETM_CTRL_CONTEXTID_MASK) {
case ETM_CTRL_CONTEXTID_NONE:
command_print(CMD_CTX, "contextid tracing: none");
command_print(CMD, "contextid tracing: none");
break;
case ETM_CTRL_CONTEXTID_8:
command_print(CMD_CTX, "contextid tracing: 8 bit");
command_print(CMD, "contextid tracing: 8 bit");
break;
case ETM_CTRL_CONTEXTID_16:
command_print(CMD_CTX, "contextid tracing: 16 bit");
command_print(CMD, "contextid tracing: 16 bit");
break;
case ETM_CTRL_CONTEXTID_32:
command_print(CMD_CTX, "contextid tracing: 32 bit");
command_print(CMD, "contextid tracing: 32 bit");
break;
}
if (tracemode & ETM_CTRL_CYCLE_ACCURATE)
command_print(CMD_CTX, "cycle-accurate tracing enabled");
command_print(CMD, "cycle-accurate tracing enabled");
else
command_print(CMD_CTX, "cycle-accurate tracing disabled");
command_print(CMD, "cycle-accurate tracing disabled");
if (tracemode & ETM_CTRL_BRANCH_OUTPUT)
command_print(CMD_CTX, "full branch address output enabled");
command_print(CMD, "full branch address output enabled");
else
command_print(CMD_CTX, "full branch address output disabled");
command_print(CMD, "full branch address output disabled");
#define TRACEMODE_MASK ( \
ETM_CTRL_CONTEXTID_MASK \
@@ -1331,7 +1331,7 @@ COMMAND_HANDLER(handle_etm_config_command)
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "target '%s' is '%s'; not an ARM",
command_print(CMD, "target '%s' is '%s'; not an ARM",
target_name(target),
target_type_name(target));
return ERROR_FAIL;
@@ -1382,7 +1382,7 @@ COMMAND_HANDLER(handle_etm_config_command)
portmode |= ETM_PORT_2BIT;
break;
default:
command_print(CMD_CTX,
command_print(CMD,
"unsupported ETM port width '%s'", CMD_ARGV[1]);
return ERROR_FAIL;
}
@@ -1394,7 +1394,7 @@ COMMAND_HANDLER(handle_etm_config_command)
else if (strcmp("demultiplexed", CMD_ARGV[2]) == 0)
portmode |= ETM_PORT_DEMUXED;
else {
command_print(CMD_CTX,
command_print(CMD,
"unsupported ETM port mode '%s', must be 'normal', 'multiplexed' or 'demultiplexed'",
CMD_ARGV[2]);
return ERROR_FAIL;
@@ -1405,7 +1405,7 @@ COMMAND_HANDLER(handle_etm_config_command)
else if (strcmp("full", CMD_ARGV[3]) == 0)
portmode |= ETM_PORT_FULL_CLOCK;
else {
command_print(CMD_CTX,
command_print(CMD,
"unsupported ETM port clocking '%s', must be 'full' or 'half'",
CMD_ARGV[3]);
return ERROR_FAIL;
@@ -1461,44 +1461,44 @@ COMMAND_HANDLER(handle_etm_info_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm = arm->etm;
if (!etm) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
command_print(CMD_CTX, "ETM v%d.%d",
command_print(CMD, "ETM v%d.%d",
etm->bcd_vers >> 4, etm->bcd_vers & 0xf);
command_print(CMD_CTX, "pairs of address comparators: %i",
command_print(CMD, "pairs of address comparators: %i",
(int) (etm->config >> 0) & 0x0f);
command_print(CMD_CTX, "data comparators: %i",
command_print(CMD, "data comparators: %i",
(int) (etm->config >> 4) & 0x0f);
command_print(CMD_CTX, "memory map decoders: %i",
command_print(CMD, "memory map decoders: %i",
(int) (etm->config >> 8) & 0x1f);
command_print(CMD_CTX, "number of counters: %i",
command_print(CMD, "number of counters: %i",
(int) (etm->config >> 13) & 0x07);
command_print(CMD_CTX, "sequencer %spresent",
command_print(CMD, "sequencer %spresent",
(int) (etm->config & (1 << 16)) ? "" : "not ");
command_print(CMD_CTX, "number of ext. inputs: %i",
command_print(CMD, "number of ext. inputs: %i",
(int) (etm->config >> 17) & 0x07);
command_print(CMD_CTX, "number of ext. outputs: %i",
command_print(CMD, "number of ext. outputs: %i",
(int) (etm->config >> 20) & 0x07);
command_print(CMD_CTX, "FIFO full %spresent",
command_print(CMD, "FIFO full %spresent",
(int) (etm->config & (1 << 23)) ? "" : "not ");
if (etm->bcd_vers < 0x20)
command_print(CMD_CTX, "protocol version: %i",
command_print(CMD, "protocol version: %i",
(int) (etm->config >> 28) & 0x07);
else {
command_print(CMD_CTX,
command_print(CMD,
"coprocessor and memory access %ssupported",
(etm->config & (1 << 26)) ? "" : "not ");
command_print(CMD_CTX, "trace start/stop %spresent",
command_print(CMD, "trace start/stop %spresent",
(etm->config & (1 << 26)) ? "" : "not ");
command_print(CMD_CTX, "number of context comparators: %i",
command_print(CMD, "number of context comparators: %i",
(int) (etm->config >> 24) & 0x03);
}
@@ -1549,30 +1549,30 @@ COMMAND_HANDLER(handle_etm_info_command)
LOG_ERROR("Illegal max_port_size");
return ERROR_FAIL;
}
command_print(CMD_CTX, "max. port size: %i", max_port_size);
command_print(CMD, "max. port size: %i", max_port_size);
if (etm->bcd_vers < 0x30) {
command_print(CMD_CTX, "half-rate clocking %ssupported",
command_print(CMD, "half-rate clocking %ssupported",
(config & (1 << 3)) ? "" : "not ");
command_print(CMD_CTX, "full-rate clocking %ssupported",
command_print(CMD, "full-rate clocking %ssupported",
(config & (1 << 4)) ? "" : "not ");
command_print(CMD_CTX, "normal trace format %ssupported",
command_print(CMD, "normal trace format %ssupported",
(config & (1 << 5)) ? "" : "not ");
command_print(CMD_CTX, "multiplex trace format %ssupported",
command_print(CMD, "multiplex trace format %ssupported",
(config & (1 << 6)) ? "" : "not ");
command_print(CMD_CTX, "demultiplex trace format %ssupported",
command_print(CMD, "demultiplex trace format %ssupported",
(config & (1 << 7)) ? "" : "not ");
} else {
/* REVISIT show which size and format are selected ... */
command_print(CMD_CTX, "current port size %ssupported",
command_print(CMD, "current port size %ssupported",
(config & (1 << 10)) ? "" : "not ");
command_print(CMD_CTX, "current trace format %ssupported",
command_print(CMD, "current trace format %ssupported",
(config & (1 << 11)) ? "" : "not ");
}
if (etm->bcd_vers >= 0x21)
command_print(CMD_CTX, "fetch comparisons %ssupported",
command_print(CMD, "fetch comparisons %ssupported",
(config & (1 << 17)) ? "not " : "");
command_print(CMD_CTX, "FIFO full %ssupported",
command_print(CMD, "FIFO full %ssupported",
(config & (1 << 8)) ? "" : "not ");
return ERROR_OK;
@@ -1588,13 +1588,13 @@ COMMAND_HANDLER(handle_etm_status_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm = arm->etm;
if (!etm) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
@@ -1608,7 +1608,7 @@ COMMAND_HANDLER(handle_etm_status_command)
if (etm_get_reg(reg) == ERROR_OK) {
unsigned s = buf_get_u32(reg->value, 0, reg->size);
command_print(CMD_CTX, "etm: %s%s%s%s",
command_print(CMD, "etm: %s%s%s%s",
/* bit(1) == progbit */
(etm->bcd_vers >= 0x12)
? ((s & (1 << 1))
@@ -1626,21 +1626,21 @@ COMMAND_HANDLER(handle_etm_status_command)
/* Trace Port Driver status */
trace_status = etm->capture_driver->status(etm);
if (trace_status == TRACE_IDLE)
command_print(CMD_CTX, "%s: idle", etm->capture_driver->name);
command_print(CMD, "%s: idle", etm->capture_driver->name);
else {
static char *completed = " completed";
static char *running = " is running";
static char *overflowed = ", overflowed";
static char *triggered = ", triggered";
command_print(CMD_CTX, "%s: trace collection%s%s%s",
command_print(CMD, "%s: trace collection%s%s%s",
etm->capture_driver->name,
(trace_status & TRACE_RUNNING) ? running : completed,
(trace_status & TRACE_OVERFLOWED) ? overflowed : "",
(trace_status & TRACE_TRIGGERED) ? triggered : "");
if (etm->trace_depth > 0) {
command_print(CMD_CTX, "%i frames of trace data read",
command_print(CMD, "%i frames of trace data read",
(int)(etm->trace_depth));
}
}
@@ -1660,20 +1660,20 @@ COMMAND_HANDLER(handle_etm_image_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
if (etm_ctx->image) {
image_close(etm_ctx->image);
free(etm_ctx->image);
command_print(CMD_CTX, "previously loaded image found and closed");
command_print(CMD, "previously loaded image found and closed");
}
etm_ctx->image = malloc(sizeof(struct image));
@@ -1711,24 +1711,24 @@ COMMAND_HANDLER(handle_etm_dump_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
if (etm_ctx->capture_driver->status == TRACE_IDLE) {
command_print(CMD_CTX, "trace capture wasn't enabled, no trace data captured");
command_print(CMD, "trace capture wasn't enabled, no trace data captured");
return ERROR_OK;
}
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING) {
/* TODO: if on-the-fly capture is to be supported, this needs to be changed */
command_print(CMD_CTX, "trace capture not completed");
command_print(CMD, "trace capture not completed");
return ERROR_FAIL;
}
@@ -1768,18 +1768,18 @@ COMMAND_HANDLER(handle_etm_load_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
if (etm_ctx->capture_driver->status(etm_ctx) & TRACE_RUNNING) {
command_print(CMD_CTX, "trace capture running, stop first");
command_print(CMD, "trace capture running, stop first");
return ERROR_FAIL;
}
@@ -1794,7 +1794,7 @@ COMMAND_HANDLER(handle_etm_load_command)
}
if (filesize % 4) {
command_print(CMD_CTX, "size isn't a multiple of 4, no valid trace data");
command_print(CMD, "size isn't a multiple of 4, no valid trace data");
fileio_close(file);
return ERROR_FAIL;
}
@@ -1812,7 +1812,7 @@ COMMAND_HANDLER(handle_etm_load_command)
}
etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth);
if (etm_ctx->trace_data == NULL) {
command_print(CMD_CTX, "not enough memory to perform operation");
command_print(CMD, "not enough memory to perform operation");
fileio_close(file);
return ERROR_FAIL;
}
@@ -1842,13 +1842,13 @@ COMMAND_HANDLER(handle_etm_start_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
@@ -1887,13 +1887,13 @@ COMMAND_HANDLER(handle_etm_stop_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
@@ -1923,14 +1923,14 @@ COMMAND_HANDLER(handle_etm_trigger_debug_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: %s isn't an ARM",
command_print(CMD, "ETM: %s isn't an ARM",
target_name(target));
return ERROR_FAIL;
}
etm = arm->etm;
if (!etm) {
command_print(CMD_CTX, "ETM: no ETM configured for %s",
command_print(CMD, "ETM: no ETM configured for %s",
target_name(target));
return ERROR_FAIL;
}
@@ -1955,7 +1955,7 @@ COMMAND_HANDLER(handle_etm_trigger_debug_command)
buf_set_u32(etm_ctrl_reg->value, 0, 32, etm->control);
}
command_print(CMD_CTX, "ETM: %s debug halt",
command_print(CMD, "ETM: %s debug halt",
(etm->control & ETM_CTRL_DBGRQ)
? "triggers"
: "does not trigger");
@@ -1972,13 +1972,13 @@ COMMAND_HANDLER(handle_etm_analyze_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "ETM: current target isn't an ARM");
command_print(CMD, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
etm_ctx = arm->etm;
if (!etm_ctx) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
@@ -1987,18 +1987,18 @@ COMMAND_HANDLER(handle_etm_analyze_command)
/* FIX! error should be reported inside etmv1_analyze_trace() */
switch (retval) {
case ERROR_ETM_ANALYSIS_FAILED:
command_print(CMD_CTX,
command_print(CMD,
"further analysis failed (corrupted trace data or just end of data");
break;
case ERROR_TRACE_INSTRUCTION_UNAVAILABLE:
command_print(CMD_CTX,
command_print(CMD,
"no instruction for current address available, analysis aborted");
break;
case ERROR_TRACE_IMAGE_UNAVAILABLE:
command_print(CMD_CTX, "no image available for trace analysis");
command_print(CMD, "no image available for trace analysis");
break;
default:
command_print(CMD_CTX, "unknown error");
command_print(CMD, "unknown error");
}
}

2
src/target/etm_dummy.c
View File

@@ -37,7 +37,7 @@ COMMAND_HANDLER(handle_etm_dummy_config_command)
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "target '%s' isn't an ARM", CMD_ARGV[0]);
command_print(CMD, "target '%s' isn't an ARM", CMD_ARGV[0]);
return ERROR_FAIL;
}

18
src/target/mips32.c
View File

@@ -909,7 +909,7 @@ static int mips32_verify_pointer(struct command_invocation *cmd,
struct mips32_common *mips32)
{
if (mips32->common_magic != MIPS32_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not an MIPS32");
command_print(cmd, "target is not an MIPS32");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -932,7 +932,7 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -949,12 +949,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %" PRIi32,
cp0_reg);
return ERROR_OK;
}
command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
@@ -962,12 +962,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
cp0_reg, cp0_sel);
return ERROR_OK;
}
command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
}
}
@@ -986,13 +986,13 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command)
else if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
command_print(CMD, "scan delay: %d nsec", ejtag_info->scan_delay);
if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
ejtag_info->mode = 0;
command_print(CMD_CTX, "running in legacy mode");
command_print(CMD, "running in legacy mode");
} else {
ejtag_info->mode = 1;
command_print(CMD_CTX, "running in fast queued mode");
command_print(CMD, "running in fast queued mode");
}
return ERROR_OK;

18
src/target/mips_m4k.c
View File

@@ -1274,7 +1274,7 @@ static int mips_m4k_verify_pointer(struct command_invocation *cmd,
struct mips_m4k_common *mips_m4k)
{
if (mips_m4k->common_magic != MIPSM4K_COMMON_MAGIC) {
command_print(cmd->ctx, "target is not an MIPS_M4K");
command_print(cmd, "target is not an MIPS_M4K");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -1292,7 +1292,7 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -1308,12 +1308,12 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
uint32_t value;
retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access reg %" PRIi32,
cp0_reg);
return ERROR_OK;
}
command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
} else if (CMD_ARGC == 3) {
@@ -1321,12 +1321,12 @@ COMMAND_HANDLER(mips_m4k_handle_cp0_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
if (retval != ERROR_OK) {
command_print(CMD_CTX,
command_print(CMD,
"couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
cp0_reg, cp0_sel);
return ERROR_OK;
}
command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
cp0_reg, cp0_sel, value);
}
}
@@ -1345,13 +1345,13 @@ COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
else if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
command_print(CMD, "scan delay: %d nsec", ejtag_info->scan_delay);
if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
ejtag_info->mode = 0;
command_print(CMD_CTX, "running in legacy mode");
command_print(CMD, "running in legacy mode");
} else {
ejtag_info->mode = 1;
command_print(CMD_CTX, "running in fast queued mode");
command_print(CMD, "running in fast queued mode");
}
return ERROR_OK;

120
src/target/nds32_cmd.c
View File

@@ -46,7 +46,7 @@ COMMAND_HANDLER(handle_nds32_dssim_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -57,7 +57,7 @@ COMMAND_HANDLER(handle_nds32_dssim_command)
nds32->step_isr_enable = false;
}
command_print(CMD_CTX, "%s: $INT_MASK.DSSIM: %d", target_name(target),
command_print(CMD, "%s: $INT_MASK.DSSIM: %d", target_name(target),
nds32->step_isr_enable);
return ERROR_OK;
@@ -71,7 +71,7 @@ COMMAND_HANDLER(handle_nds32_memory_access_command)
struct nds32_memory *memory = &(nds32->memory);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -88,7 +88,7 @@ COMMAND_HANDLER(handle_nds32_memory_access_command)
aice_memory_access(aice, memory->access_channel);
} else {
command_print(CMD_CTX, "%s: memory access channel: %s",
command_print(CMD, "%s: memory access channel: %s",
target_name(target),
NDS_MEMORY_ACCESS_NAME[memory->access_channel]);
}
@@ -103,18 +103,18 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command)
struct aice_port_s *aice = target_to_aice(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
if (CMD_ARGC > 0) {
if (nds32->edm.access_control == false) {
command_print(CMD_CTX, "%s does not support ACC_CTL. "
command_print(CMD, "%s does not support ACC_CTL. "
"Set memory mode to MEMORY", target_name(target));
nds32->memory.mode = NDS_MEMORY_SELECT_MEM;
} else if (nds32->edm.direct_access_local_memory == false) {
command_print(CMD_CTX, "%s does not support direct access "
command_print(CMD, "%s does not support direct access "
"local memory. Set memory mode to MEMORY",
target_name(target));
nds32->memory.mode = NDS_MEMORY_SELECT_MEM;
@@ -128,13 +128,13 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command)
nds32->memory.mode = NDS_MEMORY_SELECT_MEM;
} else if (strcmp(CMD_ARGV[0], "ilm") == 0) {
if (nds32->memory.ilm_base == 0)
command_print(CMD_CTX, "%s does not support ILM",
command_print(CMD, "%s does not support ILM",
target_name(target));
else
nds32->memory.mode = NDS_MEMORY_SELECT_ILM;
} else if (strcmp(CMD_ARGV[0], "dlm") == 0) {
if (nds32->memory.dlm_base == 0)
command_print(CMD_CTX, "%s does not support DLM",
command_print(CMD, "%s does not support DLM",
target_name(target));
else
nds32->memory.mode = NDS_MEMORY_SELECT_DLM;
@@ -145,7 +145,7 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command)
}
}
command_print(CMD_CTX, "%s: memory mode: %s",
command_print(CMD, "%s: memory mode: %s",
target_name(target),
NDS_MEMORY_SELECT_NAME[nds32->memory.mode]);
@@ -162,7 +162,7 @@ COMMAND_HANDLER(handle_nds32_cache_command)
int result;
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -173,30 +173,30 @@ COMMAND_HANDLER(handle_nds32_cache_command)
/* D$ write back */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_WBALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Write back data cache...failed",
command_print(CMD, "%s: Write back data cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Write back data cache...done",
command_print(CMD, "%s: Write back data cache...done",
target_name(target));
/* D$ invalidate */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_INVALALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Invalidate data cache...failed",
command_print(CMD, "%s: Invalidate data cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Invalidate data cache...done",
command_print(CMD, "%s: Invalidate data cache...done",
target_name(target));
} else {
if (dcache->line_size == 0)
command_print(CMD_CTX, "%s: No data cache",
command_print(CMD, "%s: No data cache",
target_name(target));
else
command_print(CMD_CTX, "%s: Data cache disabled",
command_print(CMD, "%s: Data cache disabled",
target_name(target));
}
@@ -204,23 +204,23 @@ COMMAND_HANDLER(handle_nds32_cache_command)
/* I$ invalidate */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1I_INVALALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Invalidate instruction cache...failed",
command_print(CMD, "%s: Invalidate instruction cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Invalidate instruction cache...done",
command_print(CMD, "%s: Invalidate instruction cache...done",
target_name(target));
} else {
if (icache->line_size == 0)
command_print(CMD_CTX, "%s: No instruction cache",
command_print(CMD, "%s: No instruction cache",
target_name(target));
else
command_print(CMD_CTX, "%s: Instruction cache disabled",
command_print(CMD, "%s: Instruction cache disabled",
target_name(target));
}
} else
command_print(CMD_CTX, "No valid parameter");
command_print(CMD, "No valid parameter");
}
return ERROR_OK;
@@ -235,14 +235,14 @@ COMMAND_HANDLER(handle_nds32_icache_command)
int result;
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
if (CMD_ARGC > 0) {
if (icache->line_size == 0) {
command_print(CMD_CTX, "%s: No instruction cache",
command_print(CMD, "%s: No instruction cache",
target_name(target));
return ERROR_OK;
}
@@ -252,15 +252,15 @@ COMMAND_HANDLER(handle_nds32_icache_command)
/* I$ invalidate */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1I_INVALALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Invalidate instruction cache...failed",
command_print(CMD, "%s: Invalidate instruction cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Invalidate instruction cache...done",
command_print(CMD, "%s: Invalidate instruction cache...done",
target_name(target));
} else {
command_print(CMD_CTX, "%s: Instruction cache disabled",
command_print(CMD, "%s: Instruction cache disabled",
target_name(target));
}
} else if (strcmp(CMD_ARGV[0], "enable") == 0) {
@@ -274,7 +274,7 @@ COMMAND_HANDLER(handle_nds32_icache_command)
} else if (strcmp(CMD_ARGV[0], "dump") == 0) {
/* TODO: dump cache content */
} else {
command_print(CMD_CTX, "%s: No valid parameter", target_name(target));
command_print(CMD, "%s: No valid parameter", target_name(target));
}
}
@@ -290,14 +290,14 @@ COMMAND_HANDLER(handle_nds32_dcache_command)
int result;
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
if (CMD_ARGC > 0) {
if (dcache->line_size == 0) {
command_print(CMD_CTX, "%s: No data cache", target_name(target));
command_print(CMD, "%s: No data cache", target_name(target));
return ERROR_OK;
}
@@ -306,26 +306,26 @@ COMMAND_HANDLER(handle_nds32_dcache_command)
/* D$ write back */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_WBALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Write back data cache...failed",
command_print(CMD, "%s: Write back data cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Write back data cache...done",
command_print(CMD, "%s: Write back data cache...done",
target_name(target));
/* D$ invalidate */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_INVALALL, 0);
if (result != ERROR_OK) {
command_print(CMD_CTX, "%s: Invalidate data cache...failed",
command_print(CMD, "%s: Invalidate data cache...failed",
target_name(target));
return result;
}
command_print(CMD_CTX, "%s: Invalidate data cache...done",
command_print(CMD, "%s: Invalidate data cache...done",
target_name(target));
} else {
command_print(CMD_CTX, "%s: Data cache disabled",
command_print(CMD, "%s: Data cache disabled",
target_name(target));
}
} else if (strcmp(CMD_ARGV[0], "enable") == 0) {
@@ -339,7 +339,7 @@ COMMAND_HANDLER(handle_nds32_dcache_command)
} else if (strcmp(CMD_ARGV[0], "dump") == 0) {
/* TODO: dump cache content */
} else {
command_print(CMD_CTX, "%s: No valid parameter", target_name(target));
command_print(CMD, "%s: No valid parameter", target_name(target));
}
}
@@ -352,7 +352,7 @@ COMMAND_HANDLER(handle_nds32_auto_break_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -364,10 +364,10 @@ COMMAND_HANDLER(handle_nds32_auto_break_command)
}
if (nds32->auto_convert_hw_bp)
command_print(CMD_CTX, "%s: convert sw break to hw break on ROM: on",
command_print(CMD, "%s: convert sw break to hw break on ROM: on",
target_name(target));
else
command_print(CMD_CTX, "%s: convert sw break to hw break on ROM: off",
command_print(CMD, "%s: convert sw break to hw break on ROM: off",
target_name(target));
return ERROR_OK;
@@ -379,7 +379,7 @@ COMMAND_HANDLER(handle_nds32_virtual_hosting_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -391,9 +391,9 @@ COMMAND_HANDLER(handle_nds32_virtual_hosting_command)
}
if (nds32->virtual_hosting)
command_print(CMD_CTX, "%s: virtual hosting: on", target_name(target));
command_print(CMD, "%s: virtual hosting: on", target_name(target));
else
command_print(CMD_CTX, "%s: virtual hosting: off", target_name(target));
command_print(CMD, "%s: virtual hosting: off", target_name(target));
return ERROR_OK;
}
@@ -404,7 +404,7 @@ COMMAND_HANDLER(handle_nds32_global_stop_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -429,7 +429,7 @@ COMMAND_HANDLER(handle_nds32_soft_reset_halt_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -454,7 +454,7 @@ COMMAND_HANDLER(handle_nds32_boot_time_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -470,7 +470,7 @@ COMMAND_HANDLER(handle_nds32_login_edm_passcode_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -485,7 +485,7 @@ COMMAND_HANDLER(handle_nds32_login_edm_operation_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -516,7 +516,7 @@ COMMAND_HANDLER(handle_nds32_reset_halt_as_init_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -536,7 +536,7 @@ COMMAND_HANDLER(handle_nds32_keep_target_edm_ctl_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -556,7 +556,7 @@ COMMAND_HANDLER(handle_nds32_decode_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -581,7 +581,7 @@ COMMAND_HANDLER(handle_nds32_decode_command)
read_addr, &instruction))
return ERROR_FAIL;
command_print(CMD_CTX, "%s", instruction.text);
command_print(CMD, "%s", instruction.text);
read_addr += instruction.instruction_size;
i++;
@@ -599,7 +599,7 @@ COMMAND_HANDLER(handle_nds32_decode_command)
if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, addr, &instruction))
return ERROR_FAIL;
command_print(CMD_CTX, "%s", instruction.text);
command_print(CMD, "%s", instruction.text);
} else
return ERROR_FAIL;
@@ -612,7 +612,7 @@ COMMAND_HANDLER(handle_nds32_word_access_mem_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -632,11 +632,11 @@ COMMAND_HANDLER(handle_nds32_query_target_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
command_print(CMD_CTX, "OCD");
command_print(CMD, "OCD");
return ERROR_OK;
}
@@ -647,7 +647,7 @@ COMMAND_HANDLER(handle_nds32_query_endian_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
@@ -655,9 +655,9 @@ COMMAND_HANDLER(handle_nds32_query_endian_command)
nds32_get_mapped_reg(nds32, IR0, &value_psw);
if (value_psw & 0x20)
command_print(CMD_CTX, "%s: BE", target_name(target));
command_print(CMD, "%s: BE", target_name(target));
else
command_print(CMD_CTX, "%s: LE", target_name(target));
command_print(CMD, "%s: LE", target_name(target));
return ERROR_OK;
}
@@ -668,11 +668,11 @@ COMMAND_HANDLER(handle_nds32_query_cpuid_command)
struct nds32 *nds32 = target_to_nds32(target);
if (!is_nds32(nds32)) {
command_print(CMD_CTX, "current target isn't an Andes core");
command_print(CMD, "current target isn't an Andes core");
return ERROR_FAIL;
}
command_print(CMD_CTX, "CPUID: %s", target_name(target));
command_print(CMD, "CPUID: %s", target_name(target));
return ERROR_OK;
}

20
src/target/oocd_trace.c
View File

@@ -277,7 +277,7 @@ COMMAND_HANDLER(handle_oocd_trace_config_command)
target = get_current_target(CMD_CTX);
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
@@ -306,17 +306,17 @@ COMMAND_HANDLER(handle_oocd_trace_status_command)
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
if (!arm->etm) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0) {
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'");
command_print(CMD, "current target's ETM capture driver isn't 'oocd_trace'");
return ERROR_FAIL;
}
@@ -325,9 +325,9 @@ COMMAND_HANDLER(handle_oocd_trace_status_command)
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
if (status & 0x8)
command_print(CMD_CTX, "trace clock locked");
command_print(CMD, "trace clock locked");
else
command_print(CMD_CTX, "no trace clock");
command_print(CMD, "no trace clock");
return ERROR_OK;
}
@@ -344,17 +344,17 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command)
arm = target_to_arm(target);
if (!is_arm(arm)) {
command_print(CMD_CTX, "current target isn't an ARM");
command_print(CMD, "current target isn't an ARM");
return ERROR_FAIL;
}
if (!arm->etm) {
command_print(CMD_CTX, "current target doesn't have an ETM configured");
command_print(CMD, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
if (strcmp(arm->etm->capture_driver->name, "oocd_trace") != 0) {
command_print(CMD_CTX, "current target's ETM capture driver isn't 'oocd_trace'");
command_print(CMD, "current target's ETM capture driver isn't 'oocd_trace'");
return ERROR_FAIL;
}
@@ -366,7 +366,7 @@ COMMAND_HANDLER(handle_oocd_trace_resync_command)
if (bytes_written < 1)
return ERROR_FAIL;
command_print(CMD_CTX, "requesting traceclock resync");
command_print(CMD, "requesting traceclock resync");
LOG_DEBUG("resyncing traceclk pll");
return ERROR_OK;

4
src/target/openrisc/or1k.c
View File

@@ -1291,7 +1291,7 @@ COMMAND_HANDLER(or1k_tap_list_command_handler)
list_for_each_entry(or1k_tap, &tap_list, list) {
if (or1k_tap->name)
command_print(CMD_CTX, "%s", or1k_tap->name);
command_print(CMD, "%s", or1k_tap->name);
}
return ERROR_OK;
@@ -1339,7 +1339,7 @@ COMMAND_HANDLER(or1k_du_list_command_handler)
list_for_each_entry(or1k_du, &du_list, list) {
if (or1k_du->name)
command_print(CMD_CTX, "%s", or1k_du->name);
command_print(CMD, "%s", or1k_du->name);
}
return ERROR_OK;

4
src/target/riscv/riscv.c
View File

@@ -1623,7 +1623,7 @@ COMMAND_HANDLER(riscv_authdata_read)
uint32_t value;
if (r->authdata_read(target, &value) != ERROR_OK)
return ERROR_FAIL;
command_print(CMD_CTX, "0x%" PRIx32, value);
command_print(CMD, "0x%" PRIx32, value);
return ERROR_OK;
} else {
LOG_ERROR("authdata_read is not implemented for this target.");
@@ -1676,7 +1676,7 @@ COMMAND_HANDLER(riscv_dmi_read)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
if (r->dmi_read(target, &value, address) != ERROR_OK)
return ERROR_FAIL;
command_print(CMD_CTX, "0x%" PRIx32, value);
command_print(CMD, "0x%" PRIx32, value);
return ERROR_OK;
} else {
LOG_ERROR("dmi_read is not implemented for this target.");

20
src/target/semihosting_common.c
View File

@@ -1470,7 +1470,7 @@ __COMMAND_HANDLER(handle_common_semihosting_command)
struct semihosting *semihosting = target->semihosting;
if (!semihosting) {
command_print(CMD_CTX, "semihosting not supported for current target");
command_print(CMD, "semihosting not supported for current target");
return ERROR_FAIL;
}
@@ -1493,7 +1493,7 @@ __COMMAND_HANDLER(handle_common_semihosting_command)
semihosting->is_active = is_active;
}
command_print(CMD_CTX, "semihosting is %s",
command_print(CMD, "semihosting is %s",
semihosting->is_active
? "enabled" : "disabled");
@@ -1512,19 +1512,19 @@ __COMMAND_HANDLER(handle_common_semihosting_fileio_command)
struct semihosting *semihosting = target->semihosting;
if (!semihosting) {
command_print(CMD_CTX, "semihosting not supported for current target");
command_print(CMD, "semihosting not supported for current target");
return ERROR_FAIL;
}
if (!semihosting->is_active) {
command_print(CMD_CTX, "semihosting not yet enabled for current target");
command_print(CMD, "semihosting not yet enabled for current target");
return ERROR_FAIL;
}
if (CMD_ARGC > 0)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], semihosting->is_fileio);
command_print(CMD_CTX, "semihosting fileio is %s",
command_print(CMD, "semihosting fileio is %s",
semihosting->is_fileio
? "enabled" : "disabled");
@@ -1543,7 +1543,7 @@ __COMMAND_HANDLER(handle_common_semihosting_cmdline)
struct semihosting *semihosting = target->semihosting;
if (!semihosting) {
command_print(CMD_CTX, "semihosting not supported for current target");
command_print(CMD, "semihosting not supported for current target");
return ERROR_FAIL;
}
@@ -1558,7 +1558,7 @@ __COMMAND_HANDLER(handle_common_semihosting_cmdline)
semihosting->cmdline = cmdline;
}
command_print(CMD_CTX, "semihosting command line is [%s]",
command_print(CMD, "semihosting command line is [%s]",
semihosting->cmdline);
return ERROR_OK;
@@ -1575,19 +1575,19 @@ __COMMAND_HANDLER(handle_common_semihosting_resumable_exit_command)
struct semihosting *semihosting = target->semihosting;
if (!semihosting) {
command_print(CMD_CTX, "semihosting not supported for current target");
command_print(CMD, "semihosting not supported for current target");
return ERROR_FAIL;
}
if (!semihosting->is_active) {
command_print(CMD_CTX, "semihosting not yet enabled for current target");
command_print(CMD, "semihosting not yet enabled for current target");
return ERROR_FAIL;
}
if (CMD_ARGC > 0)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], semihosting->has_resumable_exit);
command_print(CMD_CTX, "semihosting resumable exit is %s",
command_print(CMD, "semihosting resumable exit is %s",
semihosting->has_resumable_exit
? "enabled" : "disabled");

4
src/target/smp.c
View File

@@ -106,7 +106,7 @@ COMMAND_HANDLER(default_handle_smp_command)
return ERROR_COMMAND_SYNTAX_ERROR;
if (!CMD_ARGC) {
command_print(CMD_CTX, "%s", target->smp ? "on" : "off");
command_print(CMD, "%s", target->smp ? "on" : "off");
return ERROR_OK;
}
@@ -166,7 +166,7 @@ COMMAND_HANDLER(handle_smp_gdb_command)
target->gdb_service->core[1] = coreid;
}
command_print(CMD_CTX, "gdb coreid %" PRId32 " -> %" PRId32, target->gdb_service->core[0]
command_print(CMD, "gdb coreid %" PRId32 " -> %" PRId32, target->gdb_service->core[0]
, target->gdb_service->core[1]);
}
return ERROR_OK;

4
src/target/stm8.c
View File

@@ -2147,7 +2147,7 @@ COMMAND_HANDLER(stm8_handle_enable_step_irq_command)
stm8->enable_step_irq = enable;
}
msg = stm8->enable_step_irq ? "enabled" : "disabled";
command_print(CMD_CTX, "enable_step_irq = %s", msg);
command_print(CMD, "enable_step_irq = %s", msg);
return ERROR_OK;
}
@@ -2163,7 +2163,7 @@ COMMAND_HANDLER(stm8_handle_enable_stm8l_command)
stm8->enable_stm8l = enable;
}
msg = stm8->enable_stm8l ? "enabled" : "disabled";
command_print(CMD_CTX, "enable_stm8l = %s", msg);
command_print(CMD, "enable_stm8l = %s", msg);
stm8_init_flash_regs(stm8->enable_stm8l, stm8);
return ERROR_OK;
}

128
src/target/target.c
View File

@@ -670,7 +670,7 @@ static int target_process_reset(struct command_invocation *cmd, enum target_rese
if (retval != JIM_OK) {
Jim_MakeErrorMessage(cmd->ctx->interp);
command_print(cmd->ctx, "%s", Jim_GetString(Jim_GetResult(cmd->ctx->interp), NULL));
command_print(cmd, "%s", Jim_GetString(Jim_GetResult(cmd->ctx->interp), NULL));
return ERROR_FAIL;
}
@@ -2612,8 +2612,8 @@ COMMAND_HANDLER(handle_targets_command)
}
struct target *target = all_targets;
command_print(CMD_CTX, " TargetName Type Endian TapName State ");
command_print(CMD_CTX, "-- ------------------ ---------- ------ ------------------ ------------");
command_print(CMD, " TargetName Type Endian TapName State ");
command_print(CMD, "-- ------------------ ---------- ------ ------------------ ------------");
while (target) {
const char *state;
char marker = ' ';
@@ -2627,7 +2627,7 @@ COMMAND_HANDLER(handle_targets_command)
marker = '*';
/* keep columns lined up to match the headers above */
command_print(CMD_CTX,
command_print(CMD,
"%2d%c %-18s %-10s %-6s %-18s %s",
target->target_number,
marker,
@@ -2837,7 +2837,7 @@ COMMAND_HANDLER(handle_reg_command)
while (cache) {
unsigned i;
command_print(CMD_CTX, "===== %s", cache->name);
command_print(CMD, "===== %s", cache->name);
for (i = 0, reg = cache->reg_list;
i < cache->num_regs;
@@ -2848,7 +2848,7 @@ COMMAND_HANDLER(handle_reg_command)
if (reg->valid) {
value = buf_to_str(reg->value,
reg->size, 16);
command_print(CMD_CTX,
command_print(CMD,
"(%i) %s (/%" PRIu32 "): 0x%s%s",
count, reg->name,
reg->size, value,
@@ -2857,7 +2857,7 @@ COMMAND_HANDLER(handle_reg_command)
: "");
free(value);
} else {
command_print(CMD_CTX, "(%i) %s (/%" PRIu32 ")",
command_print(CMD, "(%i) %s (/%" PRIu32 ")",
count, reg->name,
reg->size) ;
}
@@ -2889,7 +2889,7 @@ COMMAND_HANDLER(handle_reg_command)
}
if (!reg) {
command_print(CMD_CTX, "%i is out of bounds, the current target "
command_print(CMD, "%i is out of bounds, the current target "
"has only %i registers (0 - %i)", num, count, count - 1);
return ERROR_OK;
}
@@ -2915,7 +2915,7 @@ COMMAND_HANDLER(handle_reg_command)
if (reg->valid == 0)
reg->type->get(reg);
value = buf_to_str(reg->value, reg->size, 16);
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
free(value);
return ERROR_OK;
}
@@ -2930,7 +2930,7 @@ COMMAND_HANDLER(handle_reg_command)
reg->type->set(reg, buf);
value = buf_to_str(reg->value, reg->size, 16);
command_print(CMD_CTX, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
command_print(CMD, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
free(value);
free(buf);
@@ -2941,7 +2941,7 @@ COMMAND_HANDLER(handle_reg_command)
return ERROR_COMMAND_SYNTAX_ERROR;
not_found:
command_print(CMD_CTX, "register %s not found in current target", CMD_ARGV[0]);
command_print(CMD, "register %s not found in current target", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -2951,9 +2951,9 @@ COMMAND_HANDLER(handle_poll_command)
struct target *target = get_current_target(CMD_CTX);
if (CMD_ARGC == 0) {
command_print(CMD_CTX, "background polling: %s",
command_print(CMD, "background polling: %s",
jtag_poll_get_enabled() ? "on" : "off");
command_print(CMD_CTX, "TAP: %s (%s)",
command_print(CMD, "TAP: %s (%s)",
target->tap->dotted_name,
target->tap->enabled ? "enabled" : "disabled");
if (!target->tap->enabled)
@@ -3183,7 +3183,7 @@ static void handle_md_output(struct command_invocation *cmd,
value_fmt, value);
if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
command_print(cmd->ctx, "%s", output);
command_print(cmd, "%s", output);
output_len = 0;
}
}
@@ -3413,7 +3413,7 @@ COMMAND_HANDLER(handle_load_image_command)
for (i = 0; i < image.num_sections; i++) {
buffer = malloc(image.sections[i].size);
if (buffer == NULL) {
command_print(CMD_CTX,
command_print(CMD,
"error allocating buffer for section (%d bytes)",
(int)(image.sections[i].size));
retval = ERROR_FAIL;
@@ -3450,7 +3450,7 @@ COMMAND_HANDLER(handle_load_image_command)
break;
}
image_size += length;
command_print(CMD_CTX, "%u bytes written at address " TARGET_ADDR_FMT "",
command_print(CMD, "%u bytes written at address " TARGET_ADDR_FMT "",
(unsigned int)length,
image.sections[i].base_address + offset);
}
@@ -3459,7 +3459,7 @@ COMMAND_HANDLER(handle_load_image_command)
}
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "downloaded %" PRIu32 " bytes "
command_print(CMD, "downloaded %" PRIu32 " bytes "
"in %fs (%0.3f KiB/s)", image_size,
duration_elapsed(&bench), duration_kbps(&bench, image_size));
}
@@ -3520,7 +3520,7 @@ COMMAND_HANDLER(handle_dump_image_command)
retval = fileio_size(fileio, &filesize);
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX,
command_print(CMD,
"dumped %zu bytes in %fs (%0.3f KiB/s)", filesize,
duration_elapsed(&bench), duration_kbps(&bench, filesize));
}
@@ -3585,7 +3585,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
for (i = 0; i < image.num_sections; i++) {
buffer = malloc(image.sections[i].size);
if (buffer == NULL) {
command_print(CMD_CTX,
command_print(CMD,
"error allocating buffer for section (%d bytes)",
(int)(image.sections[i].size));
break;
@@ -3636,14 +3636,14 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
uint32_t t;
for (t = 0; t < buf_cnt; t++) {
if (data[t] != buffer[t]) {
command_print(CMD_CTX,
command_print(CMD,
"diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
diffs,
(unsigned)(t + image.sections[i].base_address),
data[t],
buffer[t]);
if (diffs++ >= 127) {
command_print(CMD_CTX, "More than 128 errors, the rest are not printed.");
command_print(CMD, "More than 128 errors, the rest are not printed.");
free(data);
free(buffer);
goto done;
@@ -3655,7 +3655,7 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
free(data);
}
} else {
command_print(CMD_CTX, "address " TARGET_ADDR_FMT " length 0x%08zx",
command_print(CMD, "address " TARGET_ADDR_FMT " length 0x%08zx",
image.sections[i].base_address,
buf_cnt);
}
@@ -3664,12 +3664,12 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
image_size += buf_cnt;
}
if (diffs > 0)
command_print(CMD_CTX, "No more differences found.");
command_print(CMD, "No more differences found.");
done:
if (diffs > 0)
retval = ERROR_FAIL;
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "verified %" PRIu32 " bytes "
command_print(CMD, "verified %" PRIu32 " bytes "
"in %fs (%0.3f KiB/s)", image_size,
duration_elapsed(&bench), duration_kbps(&bench, image_size));
}
@@ -3702,24 +3702,24 @@ static int handle_bp_command_list(struct command_invocation *cmd)
if (breakpoint->type == BKPT_SOFT) {
char *buf = buf_to_str(breakpoint->orig_instr,
breakpoint->length, 16);
command_print(cmd->ctx, "IVA breakpoint: " TARGET_ADDR_FMT ", 0x%x, %i, 0x%s",
command_print(cmd, "IVA breakpoint: " TARGET_ADDR_FMT ", 0x%x, %i, 0x%s",
breakpoint->address,
breakpoint->length,
breakpoint->set, buf);
free(buf);
} else {
if ((breakpoint->address == 0) && (breakpoint->asid != 0))
command_print(cmd->ctx, "Context breakpoint: 0x%8.8" PRIx32 ", 0x%x, %i",
command_print(cmd, "Context breakpoint: 0x%8.8" PRIx32 ", 0x%x, %i",
breakpoint->asid,
breakpoint->length, breakpoint->set);
else if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
command_print(cmd->ctx, "Hybrid breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
command_print(cmd, "Hybrid breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
breakpoint->address,
breakpoint->length, breakpoint->set);
command_print(cmd->ctx, "\t|--->linked with ContextID: 0x%8.8" PRIx32,
command_print(cmd, "\t|--->linked with ContextID: 0x%8.8" PRIx32,
breakpoint->asid);
} else
command_print(cmd->ctx, "Breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
command_print(cmd, "Breakpoint(IVA): " TARGET_ADDR_FMT ", 0x%x, %i",
breakpoint->address,
breakpoint->length, breakpoint->set);
}
@@ -3739,7 +3739,7 @@ static int handle_bp_command_set(struct command_invocation *cmd,
retval = breakpoint_add(target, addr, length, hw);
/* error is always logged in breakpoint_add(), do not print it again */
if (ERROR_OK == retval)
command_print(cmd->ctx, "breakpoint set at " TARGET_ADDR_FMT "", addr);
command_print(cmd, "breakpoint set at " TARGET_ADDR_FMT "", addr);
} else if (addr == 0) {
if (target->type->add_context_breakpoint == NULL) {
@@ -3749,7 +3749,7 @@ static int handle_bp_command_set(struct command_invocation *cmd,
retval = context_breakpoint_add(target, asid, length, hw);
/* error is always logged in context_breakpoint_add(), do not print it again */
if (ERROR_OK == retval)
command_print(cmd->ctx, "Context breakpoint set at 0x%8.8" PRIx32 "", asid);
command_print(cmd, "Context breakpoint set at 0x%8.8" PRIx32 "", asid);
} else {
if (target->type->add_hybrid_breakpoint == NULL) {
@@ -3759,7 +3759,7 @@ static int handle_bp_command_set(struct command_invocation *cmd,
retval = hybrid_breakpoint_add(target, addr, asid, length, hw);
/* error is always logged in hybrid_breakpoint_add(), do not print it again */
if (ERROR_OK == retval)
command_print(cmd->ctx, "Hybrid breakpoint set at 0x%8.8" PRIx32 "", asid);
command_print(cmd, "Hybrid breakpoint set at 0x%8.8" PRIx32 "", asid);
}
return retval;
}
@@ -3830,7 +3830,7 @@ COMMAND_HANDLER(handle_wp_command)
struct watchpoint *watchpoint = target->watchpoints;
while (watchpoint) {
command_print(CMD_CTX, "address: " TARGET_ADDR_FMT
command_print(CMD, "address: " TARGET_ADDR_FMT
", len: 0x%8.8" PRIx32
", r/w/a: %i, value: 0x%8.8" PRIx32
", mask: 0x%8.8" PRIx32,
@@ -3922,7 +3922,7 @@ COMMAND_HANDLER(handle_virt2phys_command)
struct target *target = get_current_target(CMD_CTX);
int retval = target->type->virt2phys(target, va, &pa);
if (retval == ERROR_OK)
command_print(CMD_CTX, "Physical address " TARGET_ADDR_FMT "", pa);
command_print(CMD, "Physical address " TARGET_ADDR_FMT "", pa);
return retval;
}
@@ -4115,7 +4115,7 @@ COMMAND_HANDLER(handle_profile_command)
write_gmon(samples, num_of_samples, CMD_ARGV[1],
with_range, start_address, end_address, target, duration_ms);
command_print(CMD_CTX, "Wrote %s", CMD_ARGV[1]);
command_print(CMD, "Wrote %s", CMD_ARGV[1]);
free(samples);
return retval;
@@ -5152,19 +5152,19 @@ COMMAND_HANDLER(handle_target_event_list)
struct target *target = get_current_target(CMD_CTX);
struct target_event_action *teap = target->event_action;
command_print(CMD_CTX, "Event actions for target (%d) %s\n",
command_print(CMD, "Event actions for target (%d) %s\n",
target->target_number,
target_name(target));
command_print(CMD_CTX, "%-25s | Body", "Event");
command_print(CMD_CTX, "------------------------- | "
command_print(CMD, "%-25s | Body", "Event");
command_print(CMD, "------------------------- | "
"----------------------------------------");
while (teap) {
Jim_Nvp *opt = Jim_Nvp_value2name_simple(nvp_target_event, teap->event);
command_print(CMD_CTX, "%-25s | %s",
command_print(CMD, "%-25s | %s",
opt->name, Jim_GetString(teap->body, NULL));
teap = teap->next;
}
command_print(CMD_CTX, "***END***");
command_print(CMD, "***END***");
return ERROR_OK;
}
static int jim_target_current_state(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
@@ -5776,7 +5776,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
fastload_num = image.num_sections;
fastload = malloc(sizeof(struct FastLoad)*image.num_sections);
if (fastload == NULL) {
command_print(CMD_CTX, "out of memory");
command_print(CMD, "out of memory");
image_close(&image);
return ERROR_FAIL;
}
@@ -5784,7 +5784,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
for (i = 0; i < image.num_sections; i++) {
buffer = malloc(image.sections[i].size);
if (buffer == NULL) {
command_print(CMD_CTX, "error allocating buffer for section (%d bytes)",
command_print(CMD, "error allocating buffer for section (%d bytes)",
(int)(image.sections[i].size));
retval = ERROR_FAIL;
break;
@@ -5816,7 +5816,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
fastload[i].data = malloc(length);
if (fastload[i].data == NULL) {
free(buffer);
command_print(CMD_CTX, "error allocating buffer for section (%" PRIu32 " bytes)",
command_print(CMD, "error allocating buffer for section (%" PRIu32 " bytes)",
length);
retval = ERROR_FAIL;
break;
@@ -5825,7 +5825,7 @@ COMMAND_HANDLER(handle_fast_load_image_command)
fastload[i].length = length;
image_size += length;
command_print(CMD_CTX, "%u bytes written at address 0x%8.8x",
command_print(CMD, "%u bytes written at address 0x%8.8x",
(unsigned int)length,
((unsigned int)(image.sections[i].base_address + offset)));
}
@@ -5834,11 +5834,11 @@ COMMAND_HANDLER(handle_fast_load_image_command)
}
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "Loaded %" PRIu32 " bytes "
command_print(CMD, "Loaded %" PRIu32 " bytes "
"in %fs (%0.3f KiB/s)", image_size,
duration_elapsed(&bench), duration_kbps(&bench, image_size));
command_print(CMD_CTX,
command_print(CMD,
"WARNING: image has not been loaded to target!"
"You can issue a 'fast_load' to finish loading.");
}
@@ -5865,7 +5865,7 @@ COMMAND_HANDLER(handle_fast_load_command)
int retval = ERROR_OK;
for (i = 0; i < fastload_num; i++) {
struct target *target = get_current_target(CMD_CTX);
command_print(CMD_CTX, "Write to 0x%08x, length 0x%08x",
command_print(CMD, "Write to 0x%08x, length 0x%08x",
(unsigned int)(fastload[i].address),
(unsigned int)(fastload[i].length));
retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data);
@@ -5875,7 +5875,7 @@ COMMAND_HANDLER(handle_fast_load_command)
}
if (retval == ERROR_OK) {
int64_t after = timeval_ms();
command_print(CMD_CTX, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
command_print(CMD, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
}
return retval;
}
@@ -5930,7 +5930,7 @@ COMMAND_HANDLER(handle_ps_command)
if ((target->rtos) && (target->rtos->type)
&& (target->rtos->type->ps_command)) {
display = target->rtos->type->ps_command(target);
command_print(CMD_CTX, "%s", display);
command_print(CMD, "%s", display);
free(display);
return ERROR_OK;
} else {
@@ -5942,10 +5942,10 @@ COMMAND_HANDLER(handle_ps_command)
static void binprint(struct command_invocation *cmd, const char *text, const uint8_t *buf, int size)
{
if (text != NULL)
command_print_sameline(cmd->ctx, "%s", text);
command_print_sameline(cmd, "%s", text);
for (int i = 0; i < size; i++)
command_print_sameline(cmd->ctx, " %02x", buf[i]);
command_print(cmd->ctx, " ");
command_print_sameline(cmd, " %02x", buf[i]);
command_print(cmd, " ");
}
COMMAND_HANDLER(handle_test_mem_access_command)
@@ -5997,7 +5997,7 @@ COMMAND_HANDLER(handle_test_mem_access_command)
read_ref[i] = rand();
read_buf[i] = read_ref[i];
}
command_print_sameline(CMD_CTX,
command_print_sameline(CMD,
"Test read %" PRIu32 " x %d @ %d to %saligned buffer: ", count,
size, offset, host_offset ? "un" : "");
@@ -6010,10 +6010,10 @@ COMMAND_HANDLER(handle_test_mem_access_command)
duration_measure(&bench);
if (retval == ERROR_TARGET_UNALIGNED_ACCESS) {
command_print(CMD_CTX, "Unsupported alignment");
command_print(CMD, "Unsupported alignment");
goto next;
} else if (retval != ERROR_OK) {
command_print(CMD_CTX, "Memory read failed");
command_print(CMD, "Memory read failed");
goto next;
}
@@ -6023,11 +6023,11 @@ COMMAND_HANDLER(handle_test_mem_access_command)
/* check result */
int result = memcmp(read_ref, read_buf, host_bufsiz);
if (result == 0) {
command_print(CMD_CTX, "Pass in %fs (%0.3f KiB/s)",
command_print(CMD, "Pass in %fs (%0.3f KiB/s)",
duration_elapsed(&bench),
duration_kbps(&bench, count * size));
} else {
command_print(CMD_CTX, "Compare failed");
command_print(CMD, "Compare failed");
binprint(CMD, "ref:", read_ref, host_bufsiz);
binprint(CMD, "buf:", read_buf, host_bufsiz);
}
@@ -6069,13 +6069,13 @@ out:
for (size_t i = 0; i < host_bufsiz; i++)
write_buf[i] = rand();
command_print_sameline(CMD_CTX,
command_print_sameline(CMD,
"Test write %" PRIu32 " x %d @ %d from %saligned buffer: ", count,
size, offset, host_offset ? "un" : "");
retval = target_write_memory(target, wa->address, 1, num_bytes, test_pattern);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "Test pattern write failed");
command_print(CMD, "Test pattern write failed");
goto nextw;
}
@@ -6092,28 +6092,28 @@ out:
duration_measure(&bench);
if (retval == ERROR_TARGET_UNALIGNED_ACCESS) {
command_print(CMD_CTX, "Unsupported alignment");
command_print(CMD, "Unsupported alignment");
goto nextw;
} else if (retval != ERROR_OK) {
command_print(CMD_CTX, "Memory write failed");
command_print(CMD, "Memory write failed");
goto nextw;
}
/* read back */
retval = target_read_memory(target, wa->address, 1, num_bytes, read_buf);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "Test pattern write failed");
command_print(CMD, "Test pattern write failed");
goto nextw;
}
/* check result */
int result = memcmp(read_ref, read_buf, num_bytes);
if (result == 0) {
command_print(CMD_CTX, "Pass in %fs (%0.3f KiB/s)",
command_print(CMD, "Pass in %fs (%0.3f KiB/s)",
duration_elapsed(&bench),
duration_kbps(&bench, count * size));
} else {
command_print(CMD_CTX, "Compare failed");
command_print(CMD, "Compare failed");
binprint(CMD, "ref:", read_ref, num_bytes);
binprint(CMD, "buf:", read_buf, num_bytes);
}

2
src/target/target_request.c
View File

@@ -283,7 +283,7 @@ COMMAND_HANDLER(handle_target_request_debugmsgs_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(CMD_CTX, "receiving debug messages from current target %s",
command_print(CMD, "receiving debug messages from current target %s",
(receiving) ? (charmsg_mode ? "charmsg" : "enabled") : "disabled");
return ERROR_OK;
}

10
src/target/trace.c
View File

@@ -53,7 +53,7 @@ COMMAND_HANDLER(handle_trace_point_command)
uint32_t i;
for (i = 0; i < trace->num_trace_points; i++) {
command_print(CMD_CTX, "trace point 0x%8.8" PRIx32 " (%lld times hit)",
command_print(CMD, "trace point 0x%8.8" PRIx32 " (%lld times hit)",
trace->trace_points[i].address,
(long long)trace->trace_points[i].hit_counter);
}
@@ -108,14 +108,14 @@ COMMAND_HANDLER(handle_trace_history_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], trace->trace_history_size);
trace->trace_history = malloc(sizeof(uint32_t) * trace->trace_history_size);
command_print(CMD_CTX, "new trace history size: %i", (int)(trace->trace_history_size));
command_print(CMD, "new trace history size: %i", (int)(trace->trace_history_size));
} else {
uint32_t i;
uint32_t first = 0;
uint32_t last = trace->trace_history_pos;
if (!trace->trace_history_size) {
command_print(CMD_CTX, "trace history buffer is not allocated");
command_print(CMD, "trace history buffer is not allocated");
return ERROR_OK;
}
@@ -128,11 +128,11 @@ COMMAND_HANDLER(handle_trace_history_command)
if (trace->trace_history[i % trace->trace_history_size] < trace->num_trace_points) {
uint32_t address;
address = trace->trace_points[trace->trace_history[i % trace->trace_history_size]].address;
command_print(CMD_CTX, "trace point %i: 0x%8.8" PRIx32 "",
command_print(CMD, "trace point %i: 0x%8.8" PRIx32 "",
(int)(trace->trace_history[i % trace->trace_history_size]),
address);
} else
command_print(CMD_CTX, "trace point %i: -not defined-",
command_print(CMD, "trace point %i: -not defined-",
(int)(trace->trace_history[i % trace->trace_history_size]));
}
}

2
src/target/x86_32_common.c
View File

@@ -1392,7 +1392,7 @@ static void handle_iod_output(struct command_invocation *cmd,
value_fmt, value);
if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
command_print(cmd->ctx, "%s", output);
command_print(cmd, "%s", output);
output_len = 0;
}
}

46
src/target/xscale.c
View File

@@ -142,7 +142,7 @@ static int xscale_verify_pointer(struct command_invocation *cmd,
struct xscale_common *xscale)
{
if (xscale->common_magic != XSCALE_COMMON_MAGIC) {
command_print(cmd->ctx, xscale_not);
command_print(cmd, xscale_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
@@ -2658,9 +2658,9 @@ static inline void xscale_display_instruction(struct target *target, uint32_t pc
{
int retval = xscale_read_instruction(target, pc, instruction);
if (retval == ERROR_OK)
command_print(cmd->ctx, "%s", instruction->text);
command_print(cmd, "%s", instruction->text);
else
command_print(cmd->ctx, "0x%8.8" PRIx32 "\t<not found in image>", pc);
command_print(cmd, "0x%8.8" PRIx32 "\t<not found in image>", pc);
}
static int xscale_analyze_trace(struct target *target, struct command_invocation *cmd)
@@ -2787,7 +2787,7 @@ static int xscale_analyze_trace(struct target *target, struct command_invocation
continue;
if (exception) {
command_print(cmd->ctx, "--- exception %i ---", exception);
command_print(cmd, "--- exception %i ---", exception);
continue;
}
@@ -2813,7 +2813,7 @@ static int xscale_analyze_trace(struct target *target, struct command_invocation
}
if (current_pc == 0)
command_print(cmd->ctx, "address unknown");
command_print(cmd, "address unknown");
continue;
}
@@ -3136,7 +3136,7 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -3150,7 +3150,7 @@ COMMAND_HANDLER(xscale_handle_mmu_command)
xscale->armv4_5_mmu.mmu_enabled = enable;
}
command_print(CMD_CTX, "mmu %s",
command_print(CMD, "mmu %s",
(xscale->armv4_5_mmu.mmu_enabled) ? "enabled" : "disabled");
return ERROR_OK;
@@ -3166,7 +3166,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -3195,7 +3195,7 @@ COMMAND_HANDLER(xscale_handle_idcache_command)
xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled :
xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled;
const char *msg = enabled ? "enabled" : "disabled";
command_print(CMD_CTX, "%s %s", CMD_NAME, msg);
command_print(CMD, "%s %s", CMD_NAME, msg);
return ERROR_OK;
}
@@ -3257,7 +3257,7 @@ COMMAND_HANDLER(xscale_handle_vector_catch_command)
dcsr_value = buf_get_u32(dcsr_reg->value, 0, 32);
for (unsigned i = 0; i < ARRAY_SIZE(vec_ids); i++) {
command_print(CMD_CTX, "%15s: %s", vec_ids[i].name,
command_print(CMD, "%15s: %s", vec_ids[i].name,
(dcsr_value & vec_ids[i].mask) ? "catch" : "ignore");
}
@@ -3279,16 +3279,16 @@ COMMAND_HANDLER(xscale_handle_vector_table_command)
if (CMD_ARGC == 0) { /* print current settings */
int idx;
command_print(CMD_CTX, "active user-set static vectors:");
command_print(CMD, "active user-set static vectors:");
for (idx = 1; idx < 8; idx++)
if (xscale->static_low_vectors_set & (1 << idx))
command_print(CMD_CTX,
command_print(CMD,
"low %d: 0x%" PRIx32,
idx,
xscale->static_low_vectors[idx]);
for (idx = 1; idx < 8; idx++)
if (xscale->static_high_vectors_set & (1 << idx))
command_print(CMD_CTX,
command_print(CMD,
"high %d: 0x%" PRIx32,
idx,
xscale->static_high_vectors[idx]);
@@ -3335,7 +3335,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -3354,7 +3354,7 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
if (CMD_ARGC >= 3)
COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], buffcount);
if (buffcount < 1) { /* invalid */
command_print(CMD_CTX, "fill buffer count must be > 0");
command_print(CMD, "fill buffer count must be > 0");
xscale->trace.mode = XSCALE_TRACE_DISABLED;
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -3371,11 +3371,11 @@ COMMAND_HANDLER(xscale_handle_trace_buffer_command)
if (xscale->trace.mode != XSCALE_TRACE_DISABLED) {
char fill_string[12];
sprintf(fill_string, "fill %d", xscale->trace.buffer_fill);
command_print(CMD_CTX, "trace buffer enabled (%s)",
command_print(CMD, "trace buffer enabled (%s)",
(xscale->trace.mode == XSCALE_TRACE_FILL)
? fill_string : "wrap");
} else
command_print(CMD_CTX, "trace buffer disabled");
command_print(CMD, "trace buffer disabled");
dcsr_value = buf_get_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 0, 32);
if (xscale->trace.mode == XSCALE_TRACE_FILL)
@@ -3402,7 +3402,7 @@ COMMAND_HANDLER(xscale_handle_trace_image_command)
if (xscale->trace.image) {
image_close(xscale->trace.image);
free(xscale->trace.image);
command_print(CMD_CTX, "previously loaded image found and closed");
command_print(CMD, "previously loaded image found and closed");
}
xscale->trace.image = malloc(sizeof(struct image));
@@ -3439,7 +3439,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
@@ -3449,7 +3449,7 @@ COMMAND_HANDLER(xscale_handle_dump_trace_command)
trace_data = xscale->trace.data;
if (!trace_data) {
command_print(CMD_CTX, "no trace data collected");
command_print(CMD, "no trace data collected");
return ERROR_OK;
}
@@ -3502,7 +3502,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
return retval;
if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
uint32_t reg_no = 0;
@@ -3536,7 +3536,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
reg_no = XSCALE_CPACCESS;
break;
default:
command_print(CMD_CTX, "invalid register number");
command_print(CMD, "invalid register number");
return ERROR_COMMAND_SYNTAX_ERROR;
}
reg = &xscale->reg_cache->reg_list[reg_no];
@@ -3548,7 +3548,7 @@ COMMAND_HANDLER(xscale_handle_cp15)
/* read cp15 control register */
xscale_get_reg(reg);
value = buf_get_u32(reg->value, 0, 32);
command_print(CMD_CTX, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size),
command_print(CMD, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size),
value);
} else if (CMD_ARGC == 2) {
uint32_t value;