auracaster/openocd
3
0
Fork 1
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM11: use shared DSCR bit names

Browse Source 
For the bits now defined in "arm_dpm.h", switch to the
shared DSCR_* symbol and remove the ARM11_DSCR_* version.

Define DSCR_INT_DIS and use it instead of the ARM11_DSCR_*
sibling symbol.  (Note:  for both ARM11 and Cortex-A8, this
should arguably be enabled by default when single stepping.)

Remove some other unused declarations in "arm11.h".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2009-12-03 16:08:04 -08:00
parent eb6c880ddc
commit 6eee0729d7
3 changed files with 24 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
src/target/arm11.h
View File

@@ -38,6 +38,7 @@
} \
} while (0)
/* bits from ARMv7 DIDR */
enum arm11_debug_version
{
ARM11_DEBUG_V6 = 0x01,
@@ -95,8 +96,6 @@ enum arm11_instructions
enum arm11_dscr
{
ARM11_DSCR_CORE_HALTED = 1 << 0,
ARM11_DSCR_CORE_RESTARTED = 1 << 1,
ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK = 0x0F << 2,
ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT = 0x00 << 2,
@@ -105,20 +104,6 @@ enum arm11_dscr
ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION = 0x03 << 2,
ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ = 0x04 << 2,
ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH = 0x05 << 2,
ARM11_DSCR_STICKY_PRECISE_DATA_ABORT = 1 << 6,
ARM11_DSCR_STICKY_IMPRECISE_DATA_ABORT = 1 << 7,
ARM11_DSCR_INTERRUPTS_DISABLE = 1 << 11,
ARM11_DSCR_EXECUTE_ARM_INSTRUCTION_ENABLE = 1 << 13,
ARM11_DSCR_MODE_SELECT = 1 << 14,
ARM11_DSCR_WDTR_FULL = 1 << 29,
ARM11_DSCR_RDTR_FULL = 1 << 30,
};
enum arm11_cpsr
{
ARM11_CPSR_T = 1 << 5,
ARM11_CPSR_J = 1 << 24,
};
enum arm11_sc7
@@ -132,10 +117,4 @@ enum arm11_sc7
ARM11_SC7_WCR0 = 112,
};
struct arm11_reg_state
{
uint32_t def_index;
struct target * target;
};
#endif /* ARM11_H */