target/cortex_a: fix memory leak of register cache

There is no method to free the register cache, allocated in
armv4_5, so we get a memory leak.
Issue identified by valgrind.

Implement the method arm_free_reg_cache() and call it in cortex_a
deinit and to exit for error during arm_dpm_setup().
Tested on dual cortex-A stm32mp15x.
This change is inspired from similar fix in commit b01b5fe13a
("armv7m: Fix memory leak in register caching.").

The same allocation is also used by target types "arm7tdmi",
"arm9tdmi", "arm11" and "xscale" but they all lack the deinit
method and I do not have relevant HW to test the fix. For such
reasons they are not addressed in this patch.

Change-Id: I4da1e1f12e36ec245d1f3b11a4eafcbd9a1d2e25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5693
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2020-05-22 18:55:34 +02:00
parent 061cae171c
commit 6f88aa0fb3
4 changed files with 25 additions and 0 deletions

View File

@@ -2959,6 +2959,7 @@ static void cortex_a_deinit_target(struct target *target)
}
free(cortex_a->brp_list);
arm_free_reg_cache(dpm->arm);
free(dpm->dbp);
free(dpm->dwp);
free(target->private_config);