target: add Espressif ESP32 basic support

ESP32 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I76fb184aa38ab9f4e30290c038b5ff8850060750
Reviewed-on: https://review.openocd.org/c/openocd/+/6989
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Erhan Kurubas
2022-05-21 23:49:54 +02:00
committed by Antonio Borneo
parent 52fbb85d2e
commit 77287b8d47
18 changed files with 1950 additions and 3 deletions

View File

@@ -474,7 +474,7 @@ static int esp32s2_soc_reset(struct target *target)
res = esp32s2_set_peri_reg_mask(target,
ESP32_S2_OPTIONS0,
ESP32_S2_SW_SYS_RST_M,
1U << ESP32_S2_SW_SYS_RST_S);
BIT(ESP32_S2_SW_SYS_RST_S));
xtensa->suppress_dsr_errors = false;
if (res != ERROR_OK) {
LOG_ERROR("Failed to write ESP32_S2_OPTIONS0 (%d)!", res);