- change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use swjdp_common_t *swjdp instead of arm_jtag_t *jtag_info
- change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs. - add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus - Set default memaccess value to 8 for Cortex-M3. - Add dap memaccess command. - document all armv7 dap cmds. - Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu]. git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@@ -1564,9 +1564,12 @@ int cortex_m3_handle_target_request(void *priv)
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int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap)
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{
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int retval;
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armv7m_common_t *armv7m;
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armv7m = &cortex_m3->armv7m;
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armv7m_init_arch_info(target, armv7m);
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/* prepare JTAG information for the new target */
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cortex_m3->jtag_info.tap = tap;
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cortex_m3->jtag_info.scann_size = 4;
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@@ -1575,6 +1578,7 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jt
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armv7m->swjdp_info.ap_csw_value = -1;
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armv7m->swjdp_info.ap_tar_value = -1;
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armv7m->swjdp_info.jtag_info = &cortex_m3->jtag_info;
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armv7m->swjdp_info.memaccess_tck = 8;
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/* initialize arch-specific breakpoint handling */
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@@ -1590,13 +1594,17 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jt
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armv7m->pre_restore_context = NULL;
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armv7m->post_restore_context = NULL;
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armv7m_init_arch_info(target, armv7m);
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armv7m->arch_info = cortex_m3;
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armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
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armv7m->store_core_reg_u32 = cortex_m3_store_core_reg_u32;
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target_register_timer_callback(cortex_m3_handle_target_request, 1, 1, target);
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if ((retval = arm_jtag_setup_connection(&cortex_m3->jtag_info)) != ERROR_OK)
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{
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return retval;
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}
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return ERROR_OK;
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}
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